Z80-Assembler		Release 1.4				Page 1
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                       1      1 ;    This program is free software: you can redistribute it and/or modify
                       2      2 ;    it under the terms of the GNU General Public License as published by
                       3      3 ;    the Free Software Foundation, either version 3 of the License, or
                       4      4 ;    (at your option) any later version.
                       5      5 ;
                       6      6 ;    This program is distributed in the hope that it will be useful,
                       7      7 ;    but WITHOUT ANY WARRANTY; without even the implied warranty of
                       8      8 ;    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                       9      9 ;    GNU General Public License for more details.
                      10     10 ;
                      11     11 ;    You should have received a copy of the GNU General Public License
                      12     12 ;    along with this program.  If not, see <http://www.gnu.org/licenses/>.
                      13     13 
                      14     14 ;	 Copyright 2011 Mario Blunk - electronics & IT engineering at www.train-z.de
                      15     15 
                      16     16 ;   Version 9.3 supports W29C020 FLASH EEPROM made by WINBOND
                      17     17 
                      18     18 ;OFFSET	equ	1800h
                      19     19 ;OFFSET	equ	8000h
0000                  20     20 OFFSET	equ	0h
                      21     21 
                      22     22 
0000                  23     23 CH0	equ	0h
0001                  24     24 CH1	equ	1h
0002                  25     25 CH2	equ	2h
0003                  26     26 CH3	equ	3h
                      27     27 
0004                  28     28 SIO_A_D	equ	4h
0006                  29     29 SIO_A_C	equ	6h
0005                  30     30 SIO_B_D	equ	5h
0007                  31     31 SIO_B_C	equ	7h
                      32     32 
0008                  33     33 PIO_A_D	equ	8h
000a                  34     34 PIO_A_C	equ	0Ah
0009                  35     35 PIO_B_D	equ	9h
000b                  36     36 PIO_B_C	equ	0Bh
                      37     37 
1800                  38     38 RAM_BOT		equ	1800h+OFFSET	;lowest user RAM address
                      39     39 
1000                  40     40 RAM_DATA_STS	equ	1000h	;holds 1 after successful download in RAM area
                      41     41 				;beginning at 1800h+OFFSET
                      42     42 
                      43     43 ;RAM_HID		equ	1000h		;lowest system RAM address
1001                  44     44 SCRATCH		equ	1001h 	;used by various functions
1002                  45     45 CMD_STS		equ	1002h	;holds status of cmd. 0=incomplete, 1=complete
1003                  46     46 PIO_A_MODE	equ	1003h	;holds current PIO A mode
1004                  47     47 PIO_A_IO_CONF	equ	1004h	;holds current IO configuration of PIO A
                      48     48 
1005                  49     49 PIO_B_MODE	equ	1005h	;holds current PIO B mode
1006                  50     50 PIO_B_IO_CONF	equ	1006h	;holds current IO configuration of PIO B
                      51     51 
1007                  52     52 RAM_TOP		equ	1007h	;here and at RAM_TOP+1 highest user RAM address stored
                      53     53 			;1008h	;highbyte of highest user RAM address
                      54     54 ;BLK_ERR		equ	1009h	;number of garbled blocks during download
100b                  55     55 OUT_LEN		equ	100Bh	;holds length of output buffer (lowbyte)
                      56     56 			;100Ch 	;holds length of output buffer (highbyte)
100d                  57     57 ECHO_STS	equ	100Dh	;holds FFh if echo enabled, 0h if echo disabled
                      58     58 
100e                  59     59 TEMP3		equ	100Eh	;used by heartbeat
                      60     60 
Z80-Assembler		Release 1.4				Page 2
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
100f                  61     61 SOURCE_ADR	equ	100Fh	;for flash programming: source address lowbyte
                      62     62 			;1010h	;source address highbyte
1011                  63     63 DEST_ADR	equ	1011h	;for flash programming: destination address lowbyte
                      64     64 			;1012h	;destination address highbyte
1013                  65     65 NUMB_OF_BYTES	equ	1013h	;for flash programming: number of bytes lowbyte
                      66     66 			;1014h	;number of byte highbyte
1015                  67     67 temp0		equ	1015h	;used by various functions, holds number of 
                      68     68 				;unsuccessful block transfers/block during download
                      69     69 			;1016h	;highbyte of temp0
101c                  70     70 CMD_LEN 	equ	101Ch	;holds actual length of cmd in cmd buffer (lowbyte)
                      71     71 			;101Dh	;holds actual length of cmd in cmd buffer (highbyte)
101e                  72     72 IN_LEN		equ	101Eh	;holds length of of last cmd in input buffer (lowbyte)
                      73     73 			;101F	;holds length of of last cmd in input buffer (highbyte)
                      74     74 			
1020                  75     75 CMD_PTR		equ	01020h	;start pos where cmd buffer begins, RX char become appended
                      76     76 				;req_number converts cmd buffer to integer NUMBER (see below)
                      77     77 				;max 32d characters allowed
                      78     78 				;so value in NUMBER may be as large as 16x8bit=128bit
1040                  79     79 STD_OUT		equ	01040h	;start pos where TX chars are stored and appended, max 64d char 
                      80     80 				;allowed
1080                  81     81 NUMBER		equ	01080h	;start pos of long number storage
                      82     82 				;no protection agains stack corruption !
                      83     83 				;stack defaults to 1800h upon system start
                      84     84 
                      85     85 ;fuer zwischenspeicherung in funktion register dump:	;v93
1100                  86     86 bak_af		equ	01100h
1102                  87     87 bak_bc		equ	01102h
1104                  88     88 bak_de		equ	01104h
1106                  89     89 bak_hl		equ	01106h
1108                  90     90 bak_ix		equ	01108h
110a                  91     91 bak_iy		equ	0110Ah
110c                  92     92 bak_pc		equ	0110Ch
110e                  93     93 bak_sp		equ	0110Eh
                      94     94 ;-------------------------------------------------------------------------------
                      95     95 
                      96     96 
                      97     97 
                      98     98 
                      99     99 
                     100    100 
                     101    101 
                     102    102 
                     103    103 ;-------PROG START UPON SYSTEM RESET BEGIN: ------------------------------------
                     104    104 	org	0+OFFSET
                     105    105 WARM_START:
0000  c3 00 01       106    106 	jp	INI_PIO
                     107    107 	
                     108    108 	;int vectors for cmd line mode
                     109    109 	org	0Ch+OFFSET
000c  fc 06          110    110 	DEFW	RX_CHA_AVAILABLE
                     111    111 	org	0Eh+OFFSET
000e  83 07          112    112 	DEFW	SPEC_RX_CONDITON
                     113    113 
                     114    114 	;int vectors for CTC
                     115    115 	org	16h+OFFSET
0016  e6 06          116    116 	DEFW	CT3_ZERO
                     117    117 
                     118    118 	;int vectors for download mode:
                     119    119 	org	1Ch+OFFSET
001c  32 05          120    120 	DEFW	BYTE_AVAILABLE
Z80-Assembler		Release 1.4				Page 3
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     121    121 	org	1Eh+OFFSET
001e  7f 05          122    122 	DEFW	SPEC_BYTE_COND
                     123    123 
                     124    124 	org	66h+OFFSET
                     125    125 ;	DEFW	NMI
0066  c3 00 00       126    126 NMI:	jp	WARM_START	;handle NMI as Master Reset
                     127    127 
                     128    128 
                     129    129 
                     130    130 ;-------PIO INIT begin-----------------------------
                     131    131 	org	0100h+OFFSET	
                     132    132 	
                     133    133 INI_PIO:
                     134    134 	;init PIO A
0100  3e 4f          135    135 	ld	a,04Fh		; set PIO A input mode
0102  d3 0a          136    136 	out	(PIO_A_C),A
0104  3e ff          137    137 	ld	a,0FFh		; set D7..0 of output register H
0106  d3 08          138    138 	out	(PIO_A_D),A	; 
                     139    139 
                     140    140 	;init PIO B
0108  3e cf          141    141 	ld	A,0CFh		; set PIO B to bit mode
010a  32 05 10       142    142 	ld	(PIO_B_MODE),A	; update global PIO B mode status variable
010d  d3 0b          143    143 	out	(PIO_B_C),A
                     144    144 
010f  3e ff          145    145 	ld	a,0FFh		; set D7..0 to input mode
0111  32 06 10       146    146 	ld	(PIO_B_IO_CONF),A	;update global PIO B IO status variable
0114  d3 0b          147    147 	out	(PIO_B_C),A	; write IO configuration into PIO B
                     148    148 	
0116  3e f0          149    149 	ld	A,0F0h		; SDA0, SCL0, SDA1, SCL1 = L
                     150    150 				; if direction of SDA or SCL changes to output
                     151    151 				; the pin will drive L
0118  d3 09          152    152 	out	(PIO_B_D),A	;loading PIO B output register
                     153    153 	
011a  db 09          154    154 	in	A,(PIO_B_D)	;check status of PIO B D7
011c  cb 7f          155    155 	bit	7,A		;when H proceed at INI_PIO_DONE
011e  c2 2c 01       156    156 	jp	nz,INI_PIO_DONE	;when L
                     157    157 	;re-init PIO B
0121  3e 4f          158    158 	ld	a,04Fh		; set PIO B input mode
0123  d3 0b          159    159 	out	(PIO_B_C),A
0125  3e ff          160    160 	ld	a,0FFh		; set D7..0 of output register H
0127  d3 09          161    161 	out	(PIO_B_D),A	; 
0129  c3 00 80       162    162 	jp	8000h		; jump to user prom bottom address
                     163    163 INI_PIO_DONE:
                     164    164 
                     165    165 
                     166    166 ;ROM_TEST:
                     167    167 ;	ld	E,06Fh	;load E with expected rom check sum
                     168    168 ;	ld	HL,0h
                     169    169 ;	ld	B,0h
                     170    170 ;	sub	A	;A,B,HL cleared
                     171    171 ;l_RT:	ld	A,B	;restore A from B
                     172    172 ;	add	A,(HL)	;add A and data where HL points to
                     173    173 ;	inc	HL	;advance HL
                     174    174 ;	ld	B,A	;backup A in B
                     175    175 ;	ld	A,H	;look if
                     176    176 ;	cp	10h	;H has reached last ROM address +1 
                     177    177 ;	jp	nz,l_RT	;loop until H has reached last ROM address +1
                     178    178 ;	ld	A,B	;restore A from B
                     179    179 ;	cp	E	;compare A with expected rom check sum
                     180    180 ;	jp	z,RT_END;if match proceed at RT_END
Z80-Assembler		Release 1.4				Page 4
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     181    181 	
                     182    182 	;init PIO A
                     183    183 ;	ld	a,0CFh		; set PIO A to bit mode
                     184    184 ;	out	(PIO_A_C),A
                     185    185 ;	ld	a,0FEh		; set D0 to output mode
                     186    186 ;	out	(PIO_A_C),A	;
                     187    187 ;	ld	a,0h		; set D0 L
                     188    188 ;	out	(PIO_A_D),A
                     189    189 ;	ld	B,0
                     190    190 ;l_RT0:	djnz	l_RT0
                     191    191 ;	jp	WARM_START
                     192    192 ;RT_END:
                     193    193 
                     194    194 ;-------------------------------------------------------------
                     195    195 INI_SYS_VAR:
012c  21 00 18       196    196 	ld	HL,1800h	; init stack pointer
012f  f9             197    197 	ld	SP,HL
0130  97             198    198 	sub	A
                     199    199 ;	ld	(BLK_ERR),A
0131  32 1c 10       200    200 	ld	(CMD_LEN),A	; reset CMD length counter
0134  32 1d 10       201    201 	ld	(CMD_LEN+1),A
0137  32 02 10       202    202 	ld	(CMD_STS),A	; clear CMD status variable
013a  32 00 10       203    203 	ld	(RAM_DATA_STS),A ; clear RAM DATA STS
013d  32 0b 10       204    204 	ld	(OUT_LEN),A	; clear STD_OUT length counter	
0140  32 0c 10       205    205 	ld	(OUT_LEN+1),A
0143  3d             206    206 	dec	A
0144  32 0d 10       207    207 	ld	(ECHO_STS),A	; set ECHO ON
                     208    208 
                     209    209 ;----------------------------------------------------------------------
                     210    210 
                     211    211 
                     212    212 	;RESET all I2C-Busses
0147  cd a5 05       213    213 	call	RST_I2C0
014a  cd b0 05       214    214 	call	RST_I2C1
                     215    215 	
                     216    216 
                     217    217 ;-------CTC INIT begin----------------------------------------------------------------------
                     218    218 INI_CTC:
                     219    219 	;init CH 1
014d  3e 03          220    220 	ld 	A,00000011b	; int off, timer on, prescaler=16, don't care ext. TRG edge,
                     221    221 				; start timer on loading constant, no time constant follows
                     222    222 				; sw-rst active, this is a ctrl cmd
014f  d3 01          223    223 	out 	(CH1),A		; CH1 is on hold now
                     224    224 
                     225    225 
                     226    226 
                     227    227 	;init CH2
                     228    228 	;CH2 divides CPU CLK by (256*256) providing clock signal at TO2 at JP3:#11 
0151  3e 27          229    229 	ld 	A,00100111b	; int off, timer on, prescaler=256, no ext. start,
                     230    230 				; start upon loading time constant, time constant follows
                     231    231 				; sw reset, this is a ctrl cmd
0153  d3 02          232    232 	out 	(CH2),A
                     233    233 ;	ld	A,0FFh		; time constant defined
0155  3e 60          234    234 	ld	A,060h		; time constant defined	;v93
0157  d3 02          235    235 	out 	(CH2),A		; and loaded into channel 2
                     236    236 				; T02 outputs 77Hz (at 5Mhz CPU CLK)
                     237    237 
                     238    238 
                     239    239 	;init CH3
                     240    240 	;CH3 is supplied by clock signal from TO2 via jumper at JP3:#11/13
Z80-Assembler		Release 1.4				Page 5
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     241    241 	;CH3 divides TO2 clock by AFh
                     242    242 	;CH3 interupts CPU appr. every 2sec to service int routine CT3_ZERO (flashed LED D0/1)
0159  3e c7          243    243 	ld 	A,11000111b	; int on, counter on, prescaler don't care, edge don't care,
                     244    244 				; time trigger don't care, time constant follows
                     245    245 				; sw reset, this is a ctrl cmd
015b  d3 03          246    246 	out 	(CH3),A
015d  3e af          247    247 	ld	A,0AFh		; time constant defined
015f  d3 03          248    248 	out 	(CH3),A		; and loaded into channel 3
                     249    249 	
0161  3e 10          250    250 	ld	A,10h		; it vector defined in bit 7-3,bit 2-1 don't care, bit 0 = 0
0163  d3 00          251    251 	out 	(CH0),A		; and loaded into channel 0
                     252    252 
                     253    253 
                     254    254 
                     255    255 	;init CH0
                     256    256 	;CH0 provides SIO A RX/TX clock
0165  3e 07          257    257 	ld 	A,00000111b	; int off, timer on, prescaler=16, don't care ext. TRG edge,
                     258    258 				; start timer on loading constant, time constant follows
                     259    259 				; sw-rst active, this is a ctrl cmd
0167  d3 00          260    260 	out 	(CH0),A
0169  3e 01          261    261 	ld	A,1h		; time constant defined
016b  d3 00          262    262 	out 	(CH0),A		; and loaded into channel 0
                     263    263 
                     264    264 				; TO0 outputs app. 10Mhz/2/16/(time constant)/16
                     265    265 				; which results in 19200 bits per sec
                     266    266 ;-------CTC INIT done-----------------------------------------------------------------------
                     267    267 
                     268    268 
                     269    269 
                     270    270 
                     271    271 
                     272    272 
                     273    273 
                     274    274 
                     275    275 
                     276    276 
                     277    277 
                     278    278 ;-------SIO INIT begin----------------------------------------------------------------------
                     279    279 INI_SIO:
016d  cd 86 07       280    280 	call	SIO_A_RESET	;cares for WR4,5,1 settings
                     281    281 
                     282    282 ;-------SIO INIT done-----------------------------------------------------------------------
                     283    283 
                     284    284 
                     285    285 
                     286    286 
                     287    287 
                     288    288 
                     289    289 
                     290    290 
                     291    291 
                     292    292 
                     293    293 
                     294    294 
                     295    295 ;-------CPU Interrupt setup begin----------------------------------------------------------
                     296    296 INT_INI:
0170  01 00 00       297    297 	ld	BC,OFFSET
0173  78             298    298 	ld	A,B
0174  ed 47          299    299 	ld	I,A	;load I reg with highbyte of OFFSET
0176  ed 5e          300    300 	im	2	;enable int mode 2
Z80-Assembler		Release 1.4				Page 6
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     301    301 	;di		;no int allowed yet, will be enabled later
0178  fb             302    302 	ei		;V841
                     303    303 ;-------CPU Interrupt setup end------------------------------------------------------------	
                     304    304 	
                     305    305 
                     306    306 
                     307    307 
                     308    308 
                     309    309 
                     310    310 
                     311    311 
                     312    312 
                     313    313 
                     314    314 
                     315    315 
                     316    316 
                     317    317 
                     318    318 ;-------MENUE begin------------------------------------------------------------------------
                     319    319 menu:
0179  21 ec 0c       320    320 	ld	HL,Welcome	;TX welcome note
017c  cd 17 08       321    321 	call	TX_STR
                     322    322 	;call	TX_STR_TERM
                     323    323 
017f  21 00 0d       324    324 	ld	HL,prompt	;TX prompt
0182  cd 17 08       325    325 	call	TX_STR
                     326    326 ;	call	TX_STR_TERM
                     327    327 
                     328    328 
                     329    329 
                     330    330 
                     331    331 
                     332    332 ;-------CMD pre processor begin-------------------------------------------
                     333    333 CMD_pre_proc:
                     334    334 ;	call	SIO_A_EI	;enable SIO_A interrupts
0185  cd 6e 07       335    335 	call	poll_CMD_cpl	;loop here until CMD_STS=complete
                     336    336 	
                     337    337 ;-------CMD pre processor end----------------------------------------------
                     338    338 
                     339    339 
                     340    340 
                     341    341 
                     342    342 
                     343    343 ;-------CMD post processor begin-------------------------------------------
                     344    344 CMD_post_proc:
                     345    345 	;verify cmd in cmd buffer against list of available cmds:
                     346    346 	
                     347    347 
                     348    348 
0188  21 dc 0e       349    349 	ld	HL,fill
018b  cd 76 04       350    350 	call	PAR_CMD
018e  d2 97 01       351    351 	jp	nc,l_16
                     352    352 
                     353    353 
0191  cd 95 09       354    354 		call	fill_mem
0194  c3 6d 04       355    355 		jp	EO_post_proc
                     356    356 
                     357    357 
                     358    358 
                     359    359 l_16:
0197  21 d6 0e       360    360 	ld	HL,copy	
Z80-Assembler		Release 1.4				Page 7
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
019a  cd 76 04       361    361 	call	PAR_CMD
019d  d2 a8 01       362    362 	jp	nc,l_15
                     363    363 
01a0  cd 65 09       364    364 		call	req_snd		;request source, number, destination address
01a3  ed b0          365    365 		ldir
01a5  c3 6d 04       366    366 		jp	EO_post_proc
                     367    367 
                     368    368 
                     369    369 
                     370    370 l_15:
01a8  21 d0 0e       371    371 	ld	HL,cmp	
01ab  cd 76 04       372    372 	call	PAR_CMD
01ae  d2 ba 01       373    373 	jp	nc,l_13
                     374    374 
01b1  cd 65 09       375    375 		call	req_snd		;request source, number, destination address
01b4  cd b5 09       376    376 		call	cmp_mem		;compare mem blocks
01b7  c3 6d 04       377    377 		jp	EO_post_proc
                     378    378 
                     379    379 
                     380    380 l_13:
01ba  21 ec 0e       381    381 	ld	HL,erf	
01bd  cd 76 04       382    382 	call	PAR_CMD
01c0  d2 d2 01       383    383 	jp	nc,l_14
                     384    384 
01c3  cd 84 0a       385    385 		call	id_check	;do id check of user flash prom
01c6  cd 50 0a       386    386 		call	prot_off	;disable sw protection
01c9  cd 70 0a       387    387 		call	fl_erase	;erase flash
01cc  cd 64 0a       388    388 		call	prot_on		;enable sw protection
01cf  c3 6d 04       389    389 		jp	EO_post_proc
                     390    390 
                     391    391 	
                     392    392 
                     393    393 l_14:	
01d2  21 e2 0e       394    394 	ld	HL,PRG_FL
01d5  cd 76 04       395    395 	call	PAR_CMD
01d8  d2 ed 01       396    396 	jp	nc,l_102
                     397    397 	
01db  cd 65 09       398    398 		call	req_snd		;request source, number, destination address
01de  cd 84 0a       399    399 		call	id_check	;do id check of user flash prom
01e1  cd 50 0a       400    400 		call	prot_off	;disable sw protection
                     401    401 		;call	fl_erase	;erase flash
01e4  cd fe 09       402    402 		call	fl_prog		;program flash
01e7  cd 64 0a       403    403 		call	prot_on		;enable sw protection
01ea  c3 6d 04       404    404 		jp	EO_post_proc
                     405    405 
                     406    406 
                     407    407 l_102:
01ed  21 94 0e       408    408 	ld	HL,POUT
01f0  cd 76 04       409    409 	call	PAR_CMD
01f3  d2 10 02       410    410 	jp	nc,l_01
                     411    411 
01f6  21 9d 0d       412    412 		ld	HL,io_adr
01f9  cd 17 08       413    413 		call	TX_STR
                     414    414 ;		call	TX_STR_TERM
01fc  cd da 07       415    415 		call	req_number	;get io address from host
01ff  4f             416    416 		ld	C,A		;save io address in c
0200  c5             417    417 		push	BC
0201  21 a7 0d       418    418 		ld	HL,io_dat
0204  cd 17 08       419    419 		call	TX_STR
                     420    420 ;		call	TX_STR_TERM
Z80-Assembler		Release 1.4				Page 8
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0207  cd da 07       421    421 		call	req_number	;get io data from host
020a  c1             422    422 		pop	BC		;restore io address in C
020b  ed 79          423    423 		out	(C),A		;output io data at io address
020d  c3 6d 04       424    424 		jp	EO_post_proc
                     425    425 
                     426    426 
                     427    427 l_01:
0210  21 9d 0e       428    428 	ld	HL,PIN
0213  cd 76 04       429    429 	call	PAR_CMD
0216  d2 36 02       430    430 	jp	nc,l_02A
                     431    431 
0219  21 9d 0d       432    432 		ld	HL,io_adr
021c  cd 17 08       433    433 		call	TX_STR
                     434    434 ;		call	TX_STR_TERM
021f  cd da 07       435    435 		call	req_number	;get io address from host
0222  4f             436    436 		ld	C,A		;save io address in c
0223  ed 78          437    437 		in	A,(C)
0225  f5             438    438 		push	AF		;backup value input from port on stack
0226  21 a7 0d       439    439 		ld	HL,io_dat	;announce transmission of input value
0229  cd 17 08       440    440 		call	TX_STR
022c  f1             441    441 		pop	AF		;restore value input from port from stack
022d  cd dc 08       442    442 		call	APP_ACCU	;append value to STD_OUT
0230  cd 10 08       443    443 		call	TX_STD_OUT	;TX input value to host
0233  c3 6d 04       444    444 		jp	EO_post_proc
                     445    445 
                     446    446 		
                     447    447 l_02A:		
0236  21 1e 0f       448    448 	ld	HL,pio_test
0239  cd 76 04       449    449 	call	PAR_CMD
023c  d2 45 02       450    450 	jp	nc,l_02
                     451    451 
023f  cd d3 0b       452    452 		call	p_test
0242  c3 6d 04       453    453 		jp	EO_post_proc
                     454    454 
                     455    455 
                     456    456 l_02:
0245  21 f8 0e       457    457 	ld	HL,RAM_S		;see comments at label l_0 and following
0248  cd 76 04       458    458 	call	PAR_CMD
024b  d2 54 02       459    459 	jp	nc,l_4
                     460    460 
024e  cd b0 08       461    461 		call	RAM_SIZE_CHK
                     462    462 ;		call	TX_STR_TERM
0251  c3 6d 04       463    463 		jp	EO_post_proc
                     464    464 
                     465    465 
                     466    466 
                     467    467 
0254  21 01 0f       468    468 l_4:	ld	HL,DLD		;see comments at label l_0 and following
0257  cd 76 04       469    469 	call	PAR_CMD
025a  d2 6c 02       470    470 	jp	nc,l_41
                     471    471 
025d  cd 7d 09       472    472 		call	req_d	;ask host for destination address
0260  21 7f 0d       473    473 		ld	HL,AWT_TRM
0263  cd 17 08       474    474 		call	TX_STR	;request user to transmit file per xmodem
                     475    475 ;		call	TX_STR_TERM
0266  cd 8a 04       476    476 		call	DWNLD	;download file
                     477    477 ;		call	TX_STR_TERM
0269  c3 6d 04       478    478 		jp	EO_post_proc
                     479    479 
                     480    480 
Z80-Assembler		Release 1.4				Page 9
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     481    481 
                     482    482 
026c  21 8f 0e       483    483 l_41:	ld	HL,HELP		;see comments at label l_0 and following
026f  cd 76 04       484    484 	call	PAR_CMD
0272  d2 7e 02       485    485 	jp	nc,l_42
                     486    486 
0275  21 94 0e       487    487 		ld	HL,CMD_SET
0278  cd 17 08       488    488 		call	TX_STR
                     489    489 ;		call	TX_STR_TERM
027b  c3 6d 04       490    490 		jp	EO_post_proc
                     491    491 
                     492    492 
                     493    493 
                     494    494 
027e  21 0d 0f       495    495 l_42:	ld	HL,EO
0281  cd 76 04       496    496 	call	PAR_CMD
0284  d2 8e 02       497    497 	jp	nc,l_5
                     498    498 	
0287  97             499    499 		sub	A
0288  32 0d 10       500    500 		ld	(ECHO_STS),A
028b  c3 6d 04       501    501 		jp	EO_post_proc
                     502    502 	
                     503    503 
                     504    504 
                     505    505 	
                     506    506 
028e  21 c7 0e       507    507 l_5:	ld	HL,VIEW_MEM	;see comments at label l_0 and following
0291  cd 76 04       508    508 	call	PAR_CMD
0294  d2 a6 02       509    509 	jp	nc,l_8
                     510    510 
0297  21 3a 0d       511    511 		ld	HL,mem_adr16
029a  cd 17 08       512    512     		call	TX_STR
                     513    513 ;		call	TX_STR_TERM
029d  cd da 07       514    514 		call	req_number	;ask host for 16 bit number
02a0  cd 08 09       515    515 		call	READ_MEM
02a3  c3 6d 04       516    516 		jp	EO_post_proc
                     517    517 
                     518    518 
                     519    519 
                     520    520 
02a6  21 07 0f       521    521 l_8:	ld	HL,ca_usr_prg		;see comments at label l_0 and following
                     522    522 
02a9  cd 76 04       523    523 	call	PAR_CMD
02ac  d2 c6 02       524    524 	jp	nc,l_9
                     525    525 
02af  21 3a 0d       526    526 		ld	HL,mem_adr16
02b2  cd 17 08       527    527     		call	TX_STR
                     528    528 ;		call	TX_STR_TERM
02b5  cd da 07       529    529 		call	req_number	;ask host for user program start address
02b8  22 15 10       530    530 		ld	(temp0),HL	;backup start address in temp0
02bb  21 c3 02       531    531 		ld	HL,l_ret	;load user program return 
02be  e5             532    532 		push	HL		;address on stack
02bf  2a 15 10       533    533 		ld	HL,(temp0)	;restore user program start address in HL
02c2  e9             534    534 		jp	(HL)		;jump to user program
02c3  c3 6d 04       535    535 l_ret:		jp	EO_post_proc
                     536    536 
                     537    537 
                     538    538 
                     539    539 
                     540    540 
Z80-Assembler		Release 1.4				Page 10
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     541    541 		
02c6  21 a5 0e       542    542 l_9:	ld	HL,RSTI2C0
02c9  cd 76 04       543    543 	call	PAR_CMD
02cc  d2 d8 02       544    544 	jp	nc,l_91
                     545    545 
                     546    546 		;resetting i2c0 bus:
02cf  cd a5 05       547    547 		call	RST_I2C0	;do 10 x LHL on SCL0 while SDA0 = H
02d2  cd 15 06       548    548 		call	SCL0_IN		;SCL0 = H
02d5  c3 6d 04       549    549 		jp	EO_post_proc
                     550    550 	
                     551    551 
                     552    552 
                     553    553 
                     554    554 	
                     555    555 
02d8  21 ac 0e       556    556 l_91:	ld	HL,RSTI2C1
02db  cd 76 04       557    557 	call	PAR_CMD
02de  d2 ea 02       558    558 	jp	nc,l_921
                     559    559 
                     560    560 		;resetting i2c1 bus:
02e1  cd b0 05       561    561 		call	RST_I2C1	;do 10 x LHL on SCL1 while SDA1 = H
02e4  cd 25 06       562    562 		call	SCL1_IN		;SCL1 = H
02e7  c3 6d 04       563    563 		jp	EO_post_proc
                     564    564 
                     565    565 
                     566    566 
02ea  21 16 0f       567    567 l_921:	ld	HL,i2c1_test
02ed  cd 76 04       568    568 	call	PAR_CMD
02f0  d2 f9 02       569    569 	jp	nc,l_10
                     570    570 
02f3  cd e7 0a       571    571 		call	i1test
                     572    572 
02f6  c3 6d 04       573    573 		jp	EO_post_proc
                     574    574 
                     575    575 
                     576    576 
                     577    577 
                     578    578 
02f9  21 b8 0e       579    579 l_10:	ld	HL,I2C0P		;access to i2c pio devices
02fc  cd 76 04       580    580 	call	PAR_CMD
02ff  d2 45 03       581    581 	jp	nc,l_112
                     582    582 
0302  cd bd 06       583    583 		call	I2C0_START
                     584    584 
0305  21 b1 0d       585    585 		ld 	HL,p0_sel	;request select code from host
0308  cd 17 08       586    586 		call	TX_STR
                     587    587 ;		call	TX_STR_TERM
030b  cd da 07       588    588 		call	req_number	;get select code from host
030e  f5             589    589 		push	AF
                     590    590 
                     591    591 		;send 8bit device address to slave:
030f  cd 85 05       592    592 		call	I2C0_tx
0312  d2 6d 04       593    593 		jp	nc,EO_post_proc
                     594    594 
0315  f1             595    595 		pop	AF	; check for write or read access requested by host
0316  cb 47          596    596 		bit	0,A			
0318  ca 30 03       597    597 		jp	z,l_651
                     598    598 
031b  21 d5 0d       599    599 		ld 	HL,p0_in	;anounce transmission of read value to host
031e  cd 17 08       600    600 		call	TX_STR
Z80-Assembler		Release 1.4				Page 11
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0321  cd 8f 06       601    601 		call	I2C0_RX		; returns with slave data byte in C
                     602    602 			
                     603    603 		;transmit data byte to host
                     604    604 		;ld	A,C
0324  cd dc 08       605    605 		call	APP_ACCU	;append value to STD_OUT
0327  cd 10 08       606    606 		call	TX_STD_OUT	;TX input value to host
                     607    607 
032a  cd cb 06       608    608 		call	I2C0_STOP
032d  c3 6d 04       609    609 		jp	EO_post_proc
                     610    610 
                     611    611 	
                     612    612 		;write access follows:
                     613    613 				
                     614    614 l_651:		;write byte into slave
0330  21 c3 0d       615    615 		ld 	HL,p0_out	;request output value from host
0333  cd 17 08       616    616 		call	TX_STR
                     617    617 ;		call	TX_STR_TERM
0336  cd da 07       618    618 		call	req_number	;get output value from host
0339  cd 85 05       619    619 		call	I2C0_tx
033c  d2 6d 04       620    620 		jp	nc,EO_post_proc
                     621    621 
033f  cd cb 06       622    622 		call	I2C0_STOP
0342  c3 6d 04       623    623 		jp	EO_post_proc
                     624    624 		
                     625    625 
                     626    626 
                     627    627 
                     628    628 l_112:
0345  21 c2 0e       629    629 	ld	HL,I2C1P		;access to i2c pio devices
0348  cd 76 04       630    630 	call	PAR_CMD
034b  d2 91 03       631    631 	jp	nc,l_11
                     632    632 
034e  cd c4 06       633    633 		call	I2C1_START
                     634    634 
0351  21 ba 0d       635    635 		ld 	HL,p1_sel	;request select code from host
0354  cd 17 08       636    636 		call	TX_STR
                     637    637 ;		call	TX_STR_TERM
0357  cd da 07       638    638 		call	req_number	;get select code from host
035a  f5             639    639 		push	AF
                     640    640 
                     641    641 		;send 8bit device address to slave:
035b  cd 95 05       642    642 		call	I2C1_tx
035e  d2 6d 04       643    643 		jp	nc,EO_post_proc
                     644    644 
0361  f1             645    645 		pop	AF
0362  cb 47          646    646 		bit	0,A	; check for write or read access requested by host
0364  ca 7c 03       647    647 		jp	z,l_652
                     648    648 
0367  21 de 0d       649    649 		ld	HL,p1_in	;anounce transmission of read value to host
036a  cd 17 08       650    650 		call	TX_STR
036d  cd a6 06       651    651 		call	I2C1_RX	; returns with slave data byte in C
                     652    652 		
                     653    653 		;transmit data byte to host
                     654    654 		;ld	A,C
0370  cd dc 08       655    655 		call	APP_ACCU	;append value to STD_OUT
0373  cd 10 08       656    656 		call	TX_STD_OUT	;TX input value to host
                     657    657 		
0376  cd d5 06       658    658 		call	I2C1_STOP
0379  c3 6d 04       659    659 		jp	EO_post_proc
                     660    660 
Z80-Assembler		Release 1.4				Page 12
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     661    661 	
                     662    662 		;write access follows:
                     663    663 				
                     664    664 l_652:		;write byte into slave
037c  21 cc 0d       665    665 		ld 	HL,p1_out	;request output value from host
037f  cd 17 08       666    666 		call	TX_STR
                     667    667 ;		call	TX_STR_TERM
0382  cd da 07       668    668 		call	req_number	;get output value from host
0385  cd 95 05       669    669 		call	I2C1_tx
0388  d2 6d 04       670    670 		jp	nc,EO_post_proc
                     671    671 
038b  cd d5 06       672    672 		call	I2C1_STOP
038e  c3 6d 04       673    673 		jp	EO_post_proc
                     674    674 
                     675    675 
                     676    676 
                     677    677 
                     678    678 	
                     679    679 	
0391  21 b3 0e       680    680 l_11:	ld	HL,I2C0F		;access to i2c flash devices
0394  cd 76 04       681    681 	call	PAR_CMD
0397  d2 fc 03       682    682 	jp	nc,l_110
                     683    683 
039a  cd bd 06       684    684 		call	I2C0_START
                     685    685 
039d  21 e7 0d       686    686 		ld	HL,f0_sel	;request device select code from host
03a0  cd 17 08       687    687 		call	TX_STR
                     688    688 ;		call	TX_STR_TERM
03a3  cd da 07       689    689 		call	req_number	;get device select code from host
03a6  f5             690    690 		push	AF
                     691    691 
03a7  cb 87          692    692 		res	0,A		; clear LSB to indicate write access to slave
03a9  cd 85 05       693    693 		call	I2C0_tx
03ac  d2 6d 04       694    694 		jp	nc,EO_post_proc
                     695    695 
03af  21 f9 0d       696    696 		ld	HL,f0_adr	;request memory address from host
03b2  cd 17 08       697    697 		call	TX_STR
                     698    698 ;		call	TX_STR_TERM
03b5  cd da 07       699    699 		call	req_number	;get memory address from host
03b8  cd 85 05       700    700 		call	I2C0_tx
03bb  d2 6d 04       701    701 		jp	nc,EO_post_proc
                     702    702 	
03be  f1             703    703 		pop	AF		; check for write or read access requested by host
03bf  f5             704    704 		push	AF
03c0  cb 47          705    705 		bit	0,A			
03c2  ca e7 03       706    706 		jp	z,l_65
                     707    707 				
                     708    708 		;read access follows:
                     709    709 
                     710    710 		;restart I2C bus 0
03c5  cd 15 06       711    711 		call	SCL0_IN		;SCL0 = H
03c8  cd bd 06       712    712 		call	I2C0_START
                     713    713 
                     714    714 		;resend 8bit device select code
03cb  f1             715    715 		pop	AF		
03cc  cd 85 05       716    716 		call	I2C0_tx
03cf  d2 6d 04       717    717 		jp	nc,EO_post_proc
                     718    718 
03d2  21 1d 0e       719    719 		ld	HL,f0_dar	; anounce transmission of read byte to host
03d5  cd 17 08       720    720 		call	TX_STR	
Z80-Assembler		Release 1.4				Page 13
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
03d8  cd 8f 06       721    721 		call	I2C0_RX	; returns with slave data byte in C
                     722    722 
                     723    723 		;forward data byte to host
                     724    724 		;ld	A,C
03db  cd dc 08       725    725 		call	APP_ACCU	;append value to STD_OUT
03de  cd 10 08       726    726 		call	TX_STD_OUT	;TX input value to host
03e1  cd cb 06       727    727 		call	I2C0_STOP
03e4  c3 6d 04       728    728 		jp	EO_post_proc
                     729    729 				
                     730    730 l_65:		;write byte into slave
03e7  21 0b 0e       731    731 		ld	HL,f0_daw	;request byte to be written from host
03ea  cd 17 08       732    732 		call	TX_STR
                     733    733 ;		call	TX_STR_TERM
03ed  cd da 07       734    734 		call	req_number	;get byte to be written from host
                     735    735 		
03f0  cd 85 05       736    736 		call	I2C0_tx
03f3  d2 6d 04       737    737 		jp	nc,EO_post_proc
                     738    738 
03f6  cd cb 06       739    739 		call	I2C0_STOP
03f9  c3 6d 04       740    740 		jp	EO_post_proc
                     741    741 
                     742    742 
                     743    743 
                     744    744 
03fc  21 bd 0e       745    745 l_110:	ld	HL,I2C1F		;access to i2c flash devices
03ff  cd 76 04       746    746 	call	PAR_CMD
0402  d2 67 04       747    747 	jp	nc,l_100
                     748    748 
0405  cd c4 06       749    749 		call	I2C1_START
                     750    750 
0408  21 f0 0d       751    751 		ld	HL,f1_sel	;request device select code from host
040b  cd 17 08       752    752 		call	TX_STR
                     753    753 ;		call	TX_STR_TERM
040e  cd da 07       754    754 		call	req_number	;get device select code from host
0411  f5             755    755 		push	AF
                     756    756 
                     757    757 		;send 8bit device select code to slave:
0412  cb 87          758    758 		res	0,A		; clear LSB to indicate write access to slave
0414  cd 95 05       759    759 		call	I2C1_tx
0417  d2 6d 04       760    760 		jp	nc,EO_post_proc
                     761    761 
041a  21 02 0e       762    762 		ld	HL,f1_adr	;request memory address from host
041d  cd 17 08       763    763 		call	TX_STR
                     764    764 ;		call	TX_STR_TERM
0420  cd da 07       765    765 		call 	req_number	;get memory address from host
0423  cd 95 05       766    766 		call	I2C1_tx
0426  d2 6d 04       767    767 		jp	nc,EO_post_proc
                     768    768 
0429  f1             769    769 		pop	AF		; check for write or read access requested by host
042a  f5             770    770 		push	AF
042b  cb 47          771    771 		bit	0,A			
042d  ca 52 04       772    772 		jp	z,l_653
                     773    773 				
                     774    774 		;read access follows:
                     775    775 
                     776    776 		;restart I2C bus 1
0430  cd 25 06       777    777 		call	SCL1_IN		;SCL1 = H
0433  cd c4 06       778    778 		call	I2C1_START
                     779    779 
                     780    780 		;resend 8bit device select code
Z80-Assembler		Release 1.4				Page 14
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0436  f1             781    781 		pop	AF
0437  cd 95 05       782    782 		call	I2C1_tx
043a  d2 6d 04       783    783 		jp	nc,EO_post_proc
                     784    784 
043d  21 26 0e       785    785 		ld	HL,f1_dar	;anounce transmission of data read to host
0440  cd 17 08       786    786 		call	TX_STR
0443  cd a6 06       787    787 		call	I2C1_RX	; returns with slave data byte in C
                     788    788 
                     789    789 		;forward data byte to host
                     790    790 		;ld	A,C
0446  cd dc 08       791    791 		call	APP_ACCU	;append value to STD_OUT
0449  cd 10 08       792    792 		call	TX_STD_OUT	;TX input value to host
044c  cd d5 06       793    793 		call	I2C1_STOP
044f  c3 6d 04       794    794 		jp	EO_post_proc
                     795    795 
                     796    796 				
                     797    797 l_653:		;write byte into slave
0452  21 14 0e       798    798 		ld	HL,f1_daw	;request byte to be written from host
0455  cd 17 08       799    799 		call	TX_STR
                     800    800 ;		call	TX_STR_TERM
0458  cd da 07       801    801 		call	req_number	;get byte to be written from host
                     802    802 		
045b  cd 95 05       803    803 		call	I2C1_tx
045e  d2 6d 04       804    804 		jp	nc,EO_post_proc
                     805    805 
0461  cd d5 06       806    806 		call	I2C1_STOP
0464  c3 6d 04       807    807 		jp	EO_post_proc
                     808    808 
                     809    809 
                     810    810 
                     811    811 
                     812    812 
                     813    813 	;--------------------------------------------------------------
                     814    814 l_100:	;process any other command this way:
                     815    815 ;	call	wait_2
0467  21 35 0d       816    816 	ld	HL,error	;TX "unkown cmd" 
046a  cd 17 08       817    817 	call	TX_STR
                     818    818 ;	call	TX_STR_TERM
                     819    819 	
                     820    820 EO_post_proc:
                     821    821 ;	call	wait_2
046d  21 00 0d       822    822 	ld	HL,prompt		;TX "prompt"
0470  cd 17 08       823    823 	call	TX_STR
                     824    824 ;	call	TX_STR_TERM
0473  c3 85 01       825    825 	jp	CMD_pre_proc	;go checking CMD_STS
                     826    826 
                     827    827 	
                     828    828 	;-------CMD parsing begin--------------------------------------------------
                     829    829 	;requires HL pointing to CMD to be parsed
                     830    830 PAR_CMD:
0476  11 20 10       831    831 	ld	DE,CMD_PTR
                     832    832 l_51:
0479  1a             833    833 	ld	A,(DE)
047a  ed a1          834    834 	CPI
047c  c2 87 04       835    835 	jp	nz,l_52 ;if mismatch of first char in cmd buffer, do next parsing
047f  13             836    836 	inc	DE	;prepare next char in cmd buffer		
0480  fe 0d          837    837 	cp	0Dh	;check for end of cmd (CR)	
0482  c2 79 04       838    838 	jp	nz,l_51		;if end of cmd reached
                     839    839 				;and start cmd execution:
                     840    840 				
Z80-Assembler		Release 1.4				Page 15
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     841    841 				;sending of NEW_LINE here removed with V80
                     842    842 				
0485  37             843    843 	scf		;if match return with carry set
0486  c9             844    844 	RET
                     845    845 
0487  37             846    846 l_52:	scf
0488  3f             847    847 	ccf		;if mismatch return with carry cleared
0489  c9             848    848 	RET
                     849    849 	;-------CMD parsing end--------------------------------------------------
                     850    850 
                     851    851 ;-------CMD post processor end-------------------------------------------------------------------------
                     852    852 
                     853    853 
                     854    854 
                     855    855 
                     856    856 
                     857    857 
                     858    858 
                     859    859 
                     860    860 
                     861    861 
                     862    862 ;-------DOWNLOAD begin--------------------------------------------------------------------
048a  0e 0b          863    863 DWNLD:	ld	C,0Bh		;defines timeout	
                     864    864 
048c  cd 43 08       865    865 TICKER:	call   	WAIT_2
048f  0d             866    866 	dec	C
0490  79             867    867 	ld	A,C
0491  fe 00          868    868 	cp	0
0493  c2 8c 04       869    869 	jp	nz,TICKER
                     870    870 
                     871    871 ;-------------
                     872    872 	;set up TX and RX:
                     873    873 ;	ld	a,00110000b	;write into WR0: error reset, select WR0
                     874    874 ;	out	(SIO_A_C),A
                     875    875 
0496  3e 18          876    876 	ld	a,018h		;write into WR0: channel reset
0498  d3 06          877    877 	out	(SIO_A_C),A
                     878    878 
049a  3e 04          879    879 	ld	a,004h		;write into WR0: select WR4
049c  d3 06          880    880 	out	(SIO_A_C),A
049e  3e 44          881    881 	ld	a,44h		;44h write into WR4: clkx16,1 stop bit, no parity
04a0  d3 06          882    882 	out	(SIO_A_C),A
                     883    883 
04a2  3e 05          884    884 	ld	a,005h		;write into WR0: select WR5
04a4  d3 06          885    885 	out	(SIO_A_C),A
04a6  3e e8          886    886 	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
04a8  d3 06          887    887 	out	(SIO_A_C),A
                     888    888 
04aa  3e 01          889    889 	ld	a,01h		;write into WR0: select WR1
04ac  d3 07          890    890 	out	(SIO_B_C),A
04ae  3e 04          891    891 	ld	a,00000100b	;no interrupt in CH B, special RX condition affects vect	
04b0  d3 07          892    892 	out	(SIO_B_C),A
                     893    893 
04b2  3e 02          894    894 	ld	a,02h		;write into WR0: select WR2
04b4  d3 07          895    895 	out	(SIO_B_C),A
04b6  3e 10          896    896 	ld	a,10h		;write into WR2: cmd line int vect (see int vec table)
04b8  d3 07          897    897 	out	(SIO_B_C),A	;bits D3,D2,D1 are changed according to RX condition
                     898    898 
04ba  97             899    899 	sub	A
04bb  32 15 10       900    900 	ld	(temp0),A	;reset bad blocks counter
Z80-Assembler		Release 1.4				Page 16
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
04be  32 00 10       901    901 	ld	(RAM_DATA_STS),A ;clear RAM DATA STS
04c1  0e 01          902    902 	ld	C,1h		;C holds first block nr to expect
04c3  2a 11 10       903    903 	ld	HL,(DEST_ADR)	;set lower destinatiion address of user program
                     904    904 
04c6  cd b6 07       905    905 	call	SIO_A_EI
04c9  cd d1 07       906    906 	call	A_RTS_ON
                     907    907 
04cc  cd 6f 05       908    908 	call	TX_NAK		;NAK indicates ready for transmission to host
                     909    909 
                     910    910 ;----------------------------
                     911    911 REC_BLOCK:
                     912    912 	;set block transfer mode
04cf  3e 21          913    913 	ld	a,21h		;write into WR0 cmd4 and select WR1
04d1  d3 06          914    914 	out	(SIO_A_C),A
04d3  3e a8          915    915 	ld	a,10101000b	;wait active, interrupt on first RX character
04d5  d3 06          916    916 	out	(SIO_A_C),A	;buffer overrun is a spec RX condition
                     917    917 
04d7  fb             918    918 	ei
04d8  cd d1 07       919    919 	call	A_RTS_ON
04db  76             920    920 	halt			;await first rx char
04dc  cd c8 07       921    921 	call	A_RTS_OFF
                     922    922 
04df  3e 01          923    923 	ld	a,01h		;write into WR0: select WR1
04e1  d3 06          924    924 	out	(SIO_A_C),A
04e3  3e 28          925    925 	ld	a,00101000b	;wait function inactive
04e5  d3 06          926    926 	out	(SIO_A_C),A
                     927    927 
                     928    928 	;check return code of block reception (e holds return code)
04e7  7b             929    929 	ld	a,e		
04e8  fe 00          930    930 	cp	0		;block finished, no error
04ea  ca ff 04       931    931 	jp	z,l_210
04ed  fe 02          932    932 	cp	2		;eot found
04ef  ca 0a 05       933    933 	jp	z,l_211
04f2  fe 03          934    934 	cp	3		;chk sum error
04f4  ca 15 05       935    935 	jp	z,l_613
                     936    936 
                     937    937 ;	call	TX_NAK		;other error ?
                     938    938 ;	sub	a
04f7  3e 10          939    939 	ld	a,10h
04f9  32 00 10       940    940 	ld	(RAM_DATA_STS),A; set RAM DATA STS to 10h
04fc  c3 2e 05       941    941 	jp	l_612
                     942    942 
04ff  cd 77 05       943    943 l_210:	call	TX_ACK		;when no error
0502  0c             944    944 	inc	c		;prepare next block to receive
0503  97             945    945 	sub	A
0504  32 15 10       946    946 	ld	(temp0),A	;clear bad block counter
0507  c3 cf 04       947    947 	jp	REC_BLOCK	
                     948    948 
050a  cd 77 05       949    949 l_211:	call	TX_ACK		;on eot
050d  3e 01          950    950 	ld	A,01h
050f  32 00 10       951    951 	ld	(RAM_DATA_STS),A; set RAM DATA STS to 01h
0512  c3 2e 05       952    952 	jp	l_612	
                     953    953 
0515  cd 6f 05       954    954 l_613:	call	TX_NAK		;on chk sum error
0518  37             955    955 	scf
0519  3f             956    956 	ccf			;clear carry flag
051a  11 80 00       957    957 	ld	DE,0080h	;subtract 80h
051d  ed 52          958    958 	sbc	HL,DE		;from HL, so HL is reset to block start address
                     959    959 
051f  3a 15 10       960    960 	ld	A,(temp0)	;count bad blocks in temp0
Z80-Assembler		Release 1.4				Page 17
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0522  3c             961    961 	inc	A
0523  32 15 10       962    962 	ld	(temp0),A	
0526  fe 09          963    963 	cp	09h
0528  ca 2e 05       964    964 	jp	z,l_612		;abort download after 9 attempts to transfer a block
052b  c3 cf 04       965    965 	jp	REC_BLOCK	;repeat block reception
                     966    966 
                     967    967 l_612:
                     968    968 DLD_END:
052e  cd 86 07       969    969 	call	SIO_A_RESET
0531  c9             970    970 	ret
                     971    971 
                     972    972 	
                     973    973 
                     974    974 ;-------Int routine upon byte available begin---------------------
                     975    975 
                     976    976 BYTE_AVAILABLE:
                     977    977 
                     978    978 EXP_SOH_EOT:
0532  db 04          979    979 	in	A,(SIO_A_D)	;read RX byte into A
0534  fe 01          980    980 l_205:	cp	01h		;check for SOH
0536  ca 42 05       981    981 	jp	z,EXP_BLK_NR
0539  fe 04          982    982 	cp	04h		;check for EOT
053b  c2 67 05       983    983 	jp	nz,l_2020
053e  1e 02          984    984 	ld	e,2h
0540  ed 4d          985    985 	reti
                     986    986 
                     987    987 	;await block number
                     988    988 EXP_BLK_NR:
0542  db 04          989    989 	in	A,(SIO_A_D)	;read RX byte into A
0544  b9             990    990 	cp	C		;check for match of block nr
0545  c2 67 05       991    991 	jp	nz,l_2020
                     992    992 
                     993    993 	;await complement of block number
0548  79             994    994 	ld	A,C		;copy block nr to expect into A
0549  2f             995    995 	CPL			;and cpl A
054a  5f             996    996 	ld	E,A		;E holds cpl of block nr to expect
                     997    997 EXP_CPL_BLK_NR:
054b  db 04          998    998 	in	A,(SIO_A_D)	;read RX byte into A
054d  bb             999    999 	cp	E		;check for cpl of block nr
054e  c2 67 05      1000   1000 	jp	nz,l_2020
                    1001   1001 
                    1002   1002 	;await data block
0551  16 00         1003   1003 	ld	D,0h		;start value of checksum
0553  06 80         1004   1004 	ld	B,80h		;defines block size 128byte		
                    1005   1005 EXP_DATA:
0555  db 04         1006   1006 	in	A,(SIO_A_D)	;read RX byte into A
0557  77            1007   1007 	ld	(HL),A
0558  82            1008   1008 	add	A,D		;update
0559  57            1009   1009 	ld	D,A		;checksum in D
055a  23            1010   1010 	inc	HL		;dest address +1
055b  10 f8         1011   1011 	djnz	EXP_DATA	;loop until block finished
                    1012   1012 		    
                    1013   1013 EXP_CHK_SUM:
055d  db 04         1014   1014 	in	A,(SIO_A_D)	;read RX byte into A
                    1015   1015 ;	ld	a,045h		;for debug only
055f  ba            1016   1016 	cp	D		;check for checksum match
0560  ca 6b 05      1017   1017 	jp	z,l_2021
0563  1e 03         1018   1018 	ld	e,3h
0565  ed 4d         1019   1019 	reti
                    1020   1020 
Z80-Assembler		Release 1.4				Page 18
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0567  1e 01         1021   1021 l_2020:	ld	E,1h
0569  ed 4d         1022   1022 	RETI
056b  1e 00         1023   1023 l_2021:	ld	E,0h
056d  ed 4d         1024   1024 	RETI		;return when block received completely
                    1025   1025 
                    1026   1026 
                    1027   1027 ;---------------------------
                    1028   1028 TX_NAK:	
056f  3e 15         1029   1029 	ld	a,15h	;send NAK 15h to host
0571  d3 04         1030   1030 	out	(SIO_A_D),A
0573  cd 2a 08      1031   1031 	call	TX_EMP
0576  c9            1032   1032 	RET
                    1033   1033 
                    1034   1034 TX_ACK:
0577  3e 06         1035   1035 	ld	a,6h	;send AK to host
0579  d3 04         1036   1036 	out	(SIO_A_D),A
057b  cd 2a 08      1037   1037 	call	TX_EMP
057e  c9            1038   1038 	RET
                    1039   1039 
                    1040   1040 
                    1041   1041 
                    1042   1042 ;-------Int routine upon RX overflow begin---------------------
                    1043   1043 SPEC_BYTE_COND:			;in case of RX overflow
057f  21 2e 05      1044   1044 	ld	HL,DLD_END
0582  e5            1045   1045 	push	HL
0583  ed 4d         1046   1046 	reti
                    1047   1047 
                    1048   1048 
                    1049   1049 ;-------DOWNLOAD end----------------------------------------------------------
                    1050   1050 
                    1051   1051 
                    1052   1052 
                    1053   1053 
                    1054   1054 
                    1055   1055 
                    1056   1056 
                    1057   1057 
                    1058   1058 ;-------I2C SUBROUTINES BEGIN---------------------------------------------
                    1059   1059 ;transmits byte to I2C device on bus 0
                    1060   1060 ;returns with carry cleared if ackn bit not found
                    1061   1061 ;modifies A,B,C,D,HL
0585  cd 55 06      1062   1062 I2C0_tx:	call	send0_byte
0588  cb 4a         1063   1063 		bit	1,D		; test D register for acknowledge bit
058a  37            1064   1064 		scf
058b  c8            1065   1065 		ret	z		;return if akn bit = L with carry set
                    1066   1066 		;when ACK error on bus - transmit error message to host and stop bus
058c  cd df 06      1067   1067 		call	TX_error
058f  cd cb 06      1068   1068 		call	I2C0_STOP
0592  37            1069   1069 		scf
0593  3f            1070   1070 		ccf
0594  c9            1071   1071 		ret			;return if akn bit = H with carry cleared
                    1072   1072 
0595  cd 72 06      1073   1073 I2C1_tx:	call	send1_byte
0598  cb 5a         1074   1074 		bit	3,D		; test D register for acknowledge bit
059a  37            1075   1075 		scf
059b  c8            1076   1076 		ret	z		;return if akn bit = L with carry set
                    1077   1077 		;when ACK error on bus - transmit error message to host and stop bus
059c  cd df 06      1078   1078 		call	TX_error
059f  cd d5 06      1079   1079 		call	I2C1_STOP
05a2  37            1080   1080 		scf
Z80-Assembler		Release 1.4				Page 19
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
05a3  3f            1081   1081 		ccf
05a4  c9            1082   1082 		ret			;return if akn bit = H with carry cleared
                    1083   1083 
                    1084   1084 
                    1085   1085 	
                    1086   1086 RST_I2C0:	;modifies A, B, D
                    1087   1087 		;SDA0 must be H for proper reset
                    1088   1088 		;leaves SDA0 = H and SCL0 = H
05a5  06 0a         1089   1089 		ld	B,0Ah	    ; do 10 SCL0 cycles while SDA0 is H
05a7  cd bb 05      1090   1090 l_77:		call	SCL0_CYCLE
05aa  10 fb         1091   1091 		djnz	l_77
05ac  cd 15 06      1092   1092 		call	SCL0_IN
05af  c9            1093   1093 		ret
                    1094   1094 
                    1095   1095 RST_I2C1:	;modifies A, B, D
                    1096   1096 		;SDA1 must be H for proper reset
                    1097   1097 		;leaves SDA1 = H and SCL1 = H
05b0  06 0a         1098   1098 		ld	B,0Ah	    ; do 10 SCL1 cycles while SDA0 is H
05b2  cd c8 05      1099   1099 l_771:		call	SCL1_CYCLE
05b5  10 fb         1100   1100 		djnz	l_771
05b7  cd 25 06      1101   1101 		call	SCL1_IN
05ba  c9            1102   1102 		ret
                    1103   1103 
                    1104   1104 SCL0_CYCLE:	;modifies A
                    1105   1105 		;returns D wherin bit 1 represents status of SDA0 while
                    1106   1106 		;SCL0 was H
                    1107   1107 		;leaves SCL0 = L
05bb  cd 35 06      1108   1108 		call	SCL0_OUT
05be  cd 15 06      1109   1109 		call	SCL0_IN
                    1110   1110 		
                    1111   1111 		;look for ackn bit
05c1  db 09         1112   1112 		in	A,(PIO_B_D)
05c3  57            1113   1113 		ld	D,A
05c4  cd 35 06      1114   1114 		call	SCL0_OUT
05c7  c9            1115   1115 		ret
                    1116   1116 
                    1117   1117 SCL1_CYCLE:	;modifies A
                    1118   1118 		;returns D wherin bit 3 represents status of SDA1 while
                    1119   1119 		;SCL1 was H
                    1120   1120 		;leaves SCL1 = L
05c8  cd 45 06      1121   1121 		call	SCL1_OUT
05cb  cd 25 06      1122   1122 		call	SCL1_IN
                    1123   1123 		
                    1124   1124 		;look for ackn bit
05ce  db 09         1125   1125 		in	A,(PIO_B_D)
05d0  57            1126   1126 		ld	D,A
05d1  cd 45 06      1127   1127 		call	SCL1_OUT
05d4  c9            1128   1128 		ret
                    1129   1129 
                    1130   1130 SDA0_IN:	;modifies A	    
                    1131   1131 		;reload PIO B mode
05d5  3a 05 10      1132   1132 		ld	A,(PIO_B_MODE)
05d8  d3 0b         1133   1133 		out	(PIO_B_C),A
                    1134   1134 		;change direction of SDA0 to input
05da  3a 06 10      1135   1135 		ld	A,(PIO_B_IO_CONF)
05dd  cb cf         1136   1136 		set	1,A
05df  d3 0b         1137   1137 		out	(PIO_B_C),A
05e1  32 06 10      1138   1138 		ld	(PIO_B_IO_CONF),A
05e4  c9            1139   1139 		ret
                    1140   1140 
Z80-Assembler		Release 1.4				Page 20
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1141   1141 SDA1_IN:	;modifies A	    
                    1142   1142 		;reload PIO B mode
05e5  3a 05 10      1143   1143 		ld	A,(PIO_B_MODE)
05e8  d3 0b         1144   1144 		out	(PIO_B_C),A
                    1145   1145 		;change direction of SDA1 to input
05ea  3a 06 10      1146   1146 		ld	A,(PIO_B_IO_CONF)
05ed  cb df         1147   1147 		set	3,A
05ef  d3 0b         1148   1148 		out	(PIO_B_C),A
05f1  32 06 10      1149   1149 		ld	(PIO_B_IO_CONF),A
05f4  c9            1150   1150 		ret
                    1151   1151 	
                    1152   1152 SDA0_OUT:	;modifies A
                    1153   1153 		;reload PIO B mode
05f5  3a 05 10      1154   1154 		ld	A,(PIO_B_MODE)
05f8  d3 0b         1155   1155 		out	(PIO_B_C),A
                    1156   1156 		;change direction of SDA0 to output
05fa  3a 06 10      1157   1157 		ld	A,(PIO_B_IO_CONF)
05fd  cb 8f         1158   1158 		res	1,A
05ff  d3 0b         1159   1159 		out	(PIO_B_C),A
0601  32 06 10      1160   1160 		ld	(PIO_B_IO_CONF),A
0604  c9            1161   1161 		ret
                    1162   1162 
                    1163   1163 SDA1_OUT:	;modifies A
                    1164   1164 		;reload PIO B mode
0605  3a 05 10      1165   1165 		ld	A,(PIO_B_MODE)
0608  d3 0b         1166   1166 		out	(PIO_B_C),A
                    1167   1167 		;change direction of SDA1 to output
060a  3a 06 10      1168   1168 		ld	A,(PIO_B_IO_CONF)
060d  cb 9f         1169   1169 		res	3,A
060f  d3 0b         1170   1170 		out	(PIO_B_C),A
0611  32 06 10      1171   1171 		ld	(PIO_B_IO_CONF),A
0614  c9            1172   1172 		ret
                    1173   1173 
                    1174   1174 SCL0_IN:	;modifies A
                    1175   1175 		;reload PIO B mode
0615  3a 05 10      1176   1176 		ld	A,(PIO_B_MODE)
0618  d3 0b         1177   1177 		out	(PIO_B_C),A
                    1178   1178 		;change direction of SCL0 to input
061a  3a 06 10      1179   1179 		ld	A,(PIO_B_IO_CONF)
061d  cb c7         1180   1180 		set	0,A
061f  d3 0b         1181   1181 		out	(PIO_B_C),A
0621  32 06 10      1182   1182 		ld	(PIO_B_IO_CONF),A
0624  c9            1183   1183 		ret
                    1184   1184 
                    1185   1185 SCL1_IN:	;modifies A
                    1186   1186 		;reload PIO B mode
0625  3a 05 10      1187   1187 		ld	A,(PIO_B_MODE)
0628  d3 0b         1188   1188 		out	(PIO_B_C),A
                    1189   1189 		;change direction of SCL1 to input
062a  3a 06 10      1190   1190 		ld	A,(PIO_B_IO_CONF)
062d  cb d7         1191   1191 		set	2,A
062f  d3 0b         1192   1192 		out	(PIO_B_C),A
0631  32 06 10      1193   1193 		ld	(PIO_B_IO_CONF),A
0634  c9            1194   1194 		ret
                    1195   1195 
                    1196   1196 SCL0_OUT:	;modifies A
                    1197   1197 		;reload PIO B mode
0635  3a 05 10      1198   1198 		ld	A,(PIO_B_MODE)
0638  d3 0b         1199   1199 		out	(PIO_B_C),A
                    1200   1200 		;change direction of SCL0 to output
Z80-Assembler		Release 1.4				Page 21
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
063a  3a 06 10      1201   1201 		ld	A,(PIO_B_IO_CONF)
063d  cb 87         1202   1202 		res	0,A
063f  d3 0b         1203   1203 		out	(PIO_B_C),A
0641  32 06 10      1204   1204 		ld	(PIO_B_IO_CONF),A
0644  c9            1205   1205 		ret
                    1206   1206 
                    1207   1207 SCL1_OUT:	;modifies A
                    1208   1208 		;reload PIO B mode
0645  3a 05 10      1209   1209 		ld	A,(PIO_B_MODE)
0648  d3 0b         1210   1210 		out	(PIO_B_C),A
                    1211   1211 		;change direction of SCL1 to output
064a  3a 06 10      1212   1212 		ld	A,(PIO_B_IO_CONF)
064d  cb 97         1213   1213 		res	2,A
064f  d3 0b         1214   1214 		out	(PIO_B_C),A
0651  32 06 10      1215   1215 		ld	(PIO_B_IO_CONF),A
0654  c9            1216   1216 		ret
                    1217   1217 
                    1218   1218 send0_byte:	;requires value to be sent in A
                    1219   1219 		;returns with bit 1 of D holding status of ACKN bit
                    1220   1220 		;and SCL0 = L and SDA0 = H
                    1221   1221 		;modifies A, B, C, D
0655  06 08         1222   1222 		ld	B,8h		; 8 bits are to be clocked out
0657  4f            1223   1223 		ld	C,A		; copy to C reg
0658  cb 21         1224   1224 l_74:		sla	C		; shift MSB of C into carry
065a  da 63 06      1225   1225 		jp	c,SDA0_H	; when L
065d  cd f5 05      1226   1226 SDA0_L:		call	SDA0_OUT	; pull SDA0 low
0660  c3 66 06      1227   1227 		jp	l_75
0663  cd d5 05      1228   1228 SDA0_H:		call	SDA0_IN		; release SDA0 to let it go high
0666  cd bb 05      1229   1229 l_75:		call	SCL0_CYCLE	; do SCL0 cycle (LHL)
0669  10 ed         1230   1230 		djnz	l_74		; process next bit of C reg
066b  cd d5 05      1231   1231 		call	SDA0_IN		; release SDA0 to let it go high
066e  cd bb 05      1232   1232 		call	SCL0_CYCLE	; do SCL0 cycle (LHL), bit 1 of D holds ackn bit
0671  c9            1233   1233 		ret
                    1234   1234 
                    1235   1235 send1_byte:	;requires value to be sent in A
                    1236   1236 		;returns with bit 3 of D holding status of ACKN bit
                    1237   1237 		;and SCL1 = L and SDA1 = H
                    1238   1238 		;modifies A, B, C, D
0672  06 08         1239   1239 		ld	B,8h		; 8 bits are to be clocked out
0674  4f            1240   1240 		ld	C,A		; copy to C reg
0675  cb 21         1241   1241 l_741:		sla	C		; shift MSB of C into carry
0677  da 80 06      1242   1242 		jp	c,SDA1_H	; when L
067a  cd 05 06      1243   1243 SDA1_L:		call	SDA1_OUT	; pull SDA1 low
067d  c3 83 06      1244   1244 		jp	l_751
0680  cd e5 05      1245   1245 SDA1_H:		call	SDA1_IN		; release SDA1 to let it go high
0683  cd c8 05      1246   1246 l_751:		call	SCL1_CYCLE	; do SCL1 cycle (LHL)
0686  10 ed         1247   1247 		djnz	l_741		; process next bit of C reg
0688  cd e5 05      1248   1248 		call	SDA1_IN		; release SDA1 to let it go high
068b  cd c8 05      1249   1249 		call	SCL1_CYCLE	; do SCL1 cycle (LHL), bit 3 of D holds ackn bit
068e  c9            1250   1250 		ret
                    1251   1251 
                    1252   1252 I2C0_RX:	;modifies A, B, D
                    1253   1253 		;returns with slave data byte in C
                    1254   1254 		;leaves SCL0 = L and SDA0 = H
068f  06 08         1255   1255 		ld	B,8h
0691  db 09         1256   1256 l_66:		in	A,(PIO_B_D)
0693  37            1257   1257 		scf
0694  cb 4f         1258   1258 		bit	1,A
0696  c2 9a 06      1259   1259 		jp	nz,H0_found	
0699  3f            1260   1260 L0_found:	ccf
Z80-Assembler		Release 1.4				Page 22
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
069a  cb 11         1261   1261 H0_found:	rl	C
069c  cd bb 05      1262   1262 		call	SCL0_CYCLE
069f  10 f0         1263   1263 		djnz	l_66
06a1  cd bb 05      1264   1264 		call	SCL0_CYCLE	;send NAK to slave
                    1265   1265 		;byte ready in C
06a4  79            1266   1266 		ld	A,C
06a5  c9            1267   1267 		ret
                    1268   1268 
                    1269   1269 
                    1270   1270 I2C1_RX:	;modifies A, B, D
                    1271   1271 		;returns with slave data byte in C
                    1272   1272 		;leaves SCL1 = L and SDA1 = H
06a6  06 08         1273   1273 		ld	B,8h
06a8  db 09         1274   1274 l_661:		in	A,(PIO_B_D)
06aa  37            1275   1275 		scf
06ab  cb 5f         1276   1276 		bit	3,A
06ad  c2 b1 06      1277   1277 		jp	nz,H1_found	
06b0  3f            1278   1278 L1_found:	ccf
06b1  cb 11         1279   1279 H1_found:	rl	C
06b3  cd c8 05      1280   1280 		call	SCL1_CYCLE
06b6  10 f0         1281   1281 		djnz	l_661
06b8  cd c8 05      1282   1282 		call	SCL1_CYCLE	;send NAK to slave
                    1283   1283 		;byte ready in C
06bb  79            1284   1284 		ld	A,C
06bc  c9            1285   1285 		ret
                    1286   1286 
                    1287   1287 
                    1288   1288 I2C0_START:	;start I2C bus 0
06bd  cd f5 05      1289   1289 		call	SDA0_OUT	;SDA = L
06c0  cd 35 06      1290   1290 		call	SCL0_OUT	;SCL = L
06c3  c9            1291   1291 		ret
                    1292   1292 
                    1293   1293 I2C1_START:	;start I2C bus 1
06c4  cd 05 06      1294   1294 		call	SDA1_OUT	;SDA = L
06c7  cd 45 06      1295   1295 		call	SCL1_OUT	;SCL = L
06ca  c9            1296   1296 		ret
                    1297   1297 
                    1298   1298 
                    1299   1299 I2C0_STOP:	;stop I2C bus 0
06cb  cd f5 05      1300   1300 		call	SDA0_OUT
06ce  cd 15 06      1301   1301 		call	SCL0_IN
06d1  cd d5 05      1302   1302 		call	SDA0_IN	
                    1303   1303 		;jp	EO_post_proc
06d4  c9            1304   1304 		ret
                    1305   1305 
                    1306   1306 I2C1_STOP:	;stop I2C bus 1
06d5  cd 05 06      1307   1307 		call	SDA1_OUT
06d8  cd 25 06      1308   1308 		call	SCL1_IN
06db  cd e5 05      1309   1309 		call	SDA1_IN	
                    1310   1310 		;jp	EO_post_proc
06de  c9            1311   1311 		ret
                    1312   1312 
                    1313   1313 
                    1314   1314 ;-------I2C SUBROUTINES END------------------------------------------
                    1315   1315 
                    1316   1316 
                    1317   1317 
                    1318   1318 
                    1319   1319 
                    1320   1320 TX_error:
Z80-Assembler		Release 1.4				Page 23
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
06df  21 35 0d      1321   1321 		ld	HL,error	; TX error message to host
06e2  cd 17 08      1322   1322 		call	TX_STR
                    1323   1323 ;		call	TX_STR_TERM
06e5  c9            1324   1324 		ret
                    1325   1325 
                    1326   1326 
                    1327   1327 
                    1328   1328 
                    1329   1329 ;-------Int. Routine for CT3 zero count begin------------------------------
                    1330   1330 CT3_ZERO:
                    1331   1331 	;flashes D0 and D1 as 2 bit binary counter
06e6  f5            1332   1332 	push	AF
                    1333   1333 
06e7  3e cf         1334   1334 	ld	A,0CFh
06e9  d3 0a         1335   1335 	out	(PIO_A_C),A	;set PIO A to bit mode
06eb  3e fc         1336   1336 	ld	A,0FCh
06ed  d3 0a         1337   1337 	out	(PIO_A_C),A	;set io configuration: A0 and A1 are outputs
06ef  3a 0e 10      1338   1338 	ld	A,(TEMP3)
06f2  3c            1339   1339 	inc	A		;inc temp3 content
06f3  d3 08         1340   1340 	out	(PIO_A_D),A	;load temp3 onto pio port A
06f5  32 0e 10      1341   1341 	ld	(TEMP3),A	;save temp3
                    1342   1342 
06f8  f1            1343   1343 	pop	AF
06f9  fb            1344   1344 	EI		;came with V784
06fa  ed 4d         1345   1345 	reti
                    1346   1346 ;-------Int. Routine for CT3 zero count begin------------------------------
                    1347   1347 
                    1348   1348 
                    1349   1349 
                    1350   1350 
                    1351   1351 
                    1352   1352 
                    1353   1353 
                    1354   1354 
                    1355   1355 ;-------SIO INTERRUPT ROUTINES for cmd line mode BEGIN-----------------------------------------
                    1356   1356 
                    1357   1357 
                    1358   1358 ;-------Int Routine upon RX charcter begin-------------------------------------------------
                    1359   1359 RX_CHA_AVAILABLE:
                    1360   1360 ;	ei			;in V841
06fc  f5            1361   1361 	push	AF		;backup AF
06fd  cd c8 07      1362   1362 	call	A_RTS_OFF
                    1363   1363 ;	ld	a,005h		;write into WR0: select WR5
                    1364   1364 ;	out	(SIO_A_C),A
                    1365   1365 ;	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
                    1366   1366 ;	out	(SIO_A_C),A
                    1367   1367 
                    1368   1368 
0700  db 04         1369   1369 	in	A,(SIO_A_D)	;read RX character into A
                    1370   1370 	;push	AF		;backup RX character
                    1371   1371 	; A holds received character
                    1372   1372 
                    1373   1373 	;add RX character to string in cmd buffer:
0702  ed 4b 1c 10   1374   1374 	ld	BC,(CMD_LEN)	;BC holds current length of command
0706  21 20 10      1375   1375 	ld	HL,CMD_PTR	;set HL at begin of cmd buffer
0709  09            1376   1376 	add	HL,BC		;HL now holds pos to store RX char in
                    1377   1377 	;pop	AF		;restore RX char in A
070a  77            1378   1378 	ld	(HL),A		;write RX char where HL points to
                    1379   1379 
070b  fd 21 0d 10   1380   1380 	ld	IY,ECHO_STS	; IY points to ECHO_STS
Z80-Assembler		Release 1.4				Page 24
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1381   1381 
                    1382   1382 	;examine RX character:
070f  fe 0d         1383   1383 	cp	0Dh		;was last RX char a CR ?
0711  ca 35 07      1384   1384 	jp	z,RX_CR
0714  fe 08         1385   1385 	cp	08h		;was last RX char a BS ?
0716  ca 59 07      1386   1386 	jp	z,RX_BSP
0719  fe 7f         1387   1387         cp	7Fh		;was last RX char a DEL ?
071b  ca 59 07      1388   1388 	jp	z,RX_BSP
                    1389   1389 	
                    1390   1390 	;for any other character:
                    1391   1391 
                    1392   1392 	;if ECHO_STS=FFh TX received char back to host
                    1393   1393 ;	ld	IY,ECHO_STS
071e  fd cb 00 0e   1394   1394 	rrc	(IY+0)		;each rotating of FFh sets carry
0722  d2 2d 07      1395   1395 	jp	nc,l_212	;if ECHO_STS<>FFh don't echo an proceed at l_212
                    1396   1396 				;echo character (HL still points at char received last)
0725  d3 04         1397   1397 	out	(SIO_A_D),A	;to host
0727  cd 2a 08      1398   1398 	call	TX_EMP
072a  cd 36 08      1399   1399 	call	RX_EMP
                    1400   1400 
                    1401   1401 l_212:
072d  03            1402   1402 	inc	BC
072e  ed 43 1c 10   1403   1403 	ld	(CMD_LEN),BC	;CMD_LEN holds current lenght of command
                    1404   1404 	;sub	A		;comm. in V841
                    1405   1405 	;ld	(CMD_STS),A	;comm. in V841 ;set or leave CMD status  "incomplete"
                    1406   1406 ;	call	A_RTS_ON	;V877
0732  c3 6b 07      1407   1407 	jp	eo_rx_cha_ava
                    1408   1408 ;	pop	AF
                    1409   1409 ;	reti
                    1410   1410 
                    1411   1411 
                    1412   1412 
                    1413   1413 	;-------process cr character begin----------
                    1414   1414 RX_CR:
                    1415   1415 ;	call	SIO_A_DI
                    1416   1416 
0735  fd cb 00 0e   1417   1417 	rrc	(IY+0)		;each rotating of FFh sets carry
0739  d2 46 07      1418   1418 	jp	nc,l_220	;if ECHO_STS<>FFh don't TX line feed an proceed at l_220
                    1419   1419 				;(ECHO is ON if ECHO_STS=FFh)
                    1420   1420 
073c  21 85 0e      1421   1421 	ld	HL,NEW_LINE	;transmit new line
073f  cd 17 08      1422   1422 	call	TX_STR
0742  ed 4b 1c 10   1423   1423 	ld	BC,(CMD_LEN)	;TX_STR modifies BC, so restore BC from CMD_LEN
                    1424   1424 
0746  ed 43 1e 10   1425   1425 l_220:  ld	(IN_LEN),BC	;copy CMD_LEN into IN_LEN
                    1426   1426 
074a  3e 01         1427   1427 	ld	A,1
074c  32 02 10      1428   1428 	ld	(CMD_STS),A	;set CMD status to "complete"
                    1429   1429 ;	call	SIO_A_DI	;disable SIO_A interrupts ;in V841
                    1430   1430 
074f  97            1431   1431 	sub	A
0750  32 1c 10      1432   1432 	ld	(CMD_LEN),A	;clear CMD_LEN
0753  32 1d 10      1433   1433 	ld	(CMD_LEN+1),A
                    1434   1434 
                    1435   1435 ;	call	A_RTS_OFF
0756  c3 6b 07      1436   1436 	jp	eo_rx_cha_ava
                    1437   1437 
                    1438   1438 ;	pop	AF		;restore AF
                    1439   1439 ;	reti			;leave procedure but do not enable interupts
                    1440   1440 	;-------process cr character end---------------
Z80-Assembler		Release 1.4				Page 25
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1441   1441 
                    1442   1442 
                    1443   1443 
                    1444   1444 	;-------process backspace charcter begin-----------
0759  21 ff ff      1445   1445 RX_BSP:	ld	HL,0FFFFh
075c  09            1446   1446 	add	HL,BC			;carry is set if CMD_LEN>0
075d  d2 6b 07      1447   1447 	jp	nc,END_OF_RX_BSP	;do not BACKSPACE if CMD_LEN=0
                    1448   1448 
0760  0b            1449   1449 	dec	BC		;if CMD_LEN>0 then CMD_LEN-1
0761  ed 43 1c 10   1450   1450 	ld	(CMD_LEN),BC	;update CMD_LEN
                    1451   1451 
0765  21 88 0e      1452   1452 	ld	HL,BS_SP_BS
0768  cd 17 08      1453   1453 	call	TX_STR
                    1454   1454 ;	call	A_RTS_ON	;V877
                    1455   1455 
                    1456   1456 END_OF_RX_BSP:
                    1457   1457 	;sub 	A		;comm. in V841
                    1458   1458 	;ld	(CMD_STS),A	;comm. in V841 ;set or leave CMD status  "incomplete"
                    1459   1459 ;	pop	AF
                    1460   1460 ;	reti
                    1461   1461 	;-------process backspace character end-----------	
                    1462   1462 
                    1463   1463 eo_rx_cha_ava:
                    1464   1464 ;	call	A_RTS_ON
076b  f1            1465   1465 	pop	AF
                    1466   1466 ;	ei
076c  ed 4d         1467   1467 	reti
                    1468   1468 	
                    1469   1469 ;-------Int Routine upon RX charcter end---------------------------------------------------	
                    1470   1470 
                    1471   1471 
                    1472   1472 
                    1473   1473 ;-------poll CMD_STS loop------------------------------
                    1474   1474 	;waits until "cmd complete"
                    1475   1475 	;modifies all registers
                    1476   1476 poll_CMD_cpl:
                    1477   1477 ;	call	SIO_A_RESET
076e  cd d1 07      1478   1478 	call	A_RTS_ON
                    1479   1479 l_690:
0771  fb            1480   1480 	ei
0772  cd d1 07      1481   1481 	call	A_RTS_ON	;V877
0775  76            1482   1482 	halt
0776  3a 02 10      1483   1483 	ld	A,(CMD_STS)
0779  fe 01         1484   1484 	cp	1h		;poll for "cmd complete"
077b  c2 71 07      1485   1485 	jp	nz,l_690
                    1486   1486 
                    1487   1487 ;	di
077e  97            1488   1488 	sub	A
077f  32 02 10      1489   1489 	ld	(CMD_STS),A
                    1490   1490 ;	call	A_RTS_OFF
                    1491   1491 ;	call	SIO_A_DI
0782  c9            1492   1492 	RET
                    1493   1493 
                    1494   1494 
                    1495   1495 
                    1496   1496 
                    1497   1497 
                    1498   1498 
                    1499   1499 ;-------Int routine upon special RX condition begin---------------------
                    1500   1500 SPEC_RX_CONDITON:
Z80-Assembler		Release 1.4				Page 26
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0783  c3 00 00      1501   1501 	jp	WARM_START
                    1502   1502 ;-------Int Routine upon special RX condition end--------------------------
                    1503   1503 
                    1504   1504 
                    1505   1505 
                    1506   1506 
                    1507   1507 
                    1508   1508 SIO_A_RESET:
                    1509   1509 	;set up TX and RX:
0786  3e 30         1510   1510 	ld	a,00110000b	;write into WR0: error reset, select WR0
0788  d3 06         1511   1511 	out	(SIO_A_C),A
                    1512   1512 
078a  3e 18         1513   1513 	ld	a,018h		;write into WR0: channel reset
078c  d3 06         1514   1514 	out	(SIO_A_C),A
                    1515   1515 
078e  3e 04         1516   1516 	ld	a,004h		;write into WR0: select WR4
0790  d3 06         1517   1517 	out	(SIO_A_C),A
0792  3e 44         1518   1518 	ld	a,44h		;44h write into WR4: clkx16,1 stop bit, no parity
0794  d3 06         1519   1519 	out	(SIO_A_C),A
                    1520   1520 
0796  3e 05         1521   1521 	ld	a,005h		;write into WR0: select WR5
0798  d3 06         1522   1522 	out	(SIO_A_C),A
079a  3e e8         1523   1523 	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
079c  d3 06         1524   1524 	out	(SIO_A_C),A
                    1525   1525 
079e  3e 01         1526   1526 	ld	a,01h		;write into WR0: select WR1
07a0  d3 07         1527   1527 	out	(SIO_B_C),A
07a2  3e 04         1528   1528 	ld	a,00000100b	;no interrupt in CH B, special RX condition affects vect	
07a4  d3 07         1529   1529 	out	(SIO_B_C),A
                    1530   1530 
07a6  3e 02         1531   1531 	ld	a,02h		;write into WR0: select WR2
07a8  d3 07         1532   1532 	out	(SIO_B_C),A
07aa  3e 00         1533   1533 	ld	a,0h		;write into WR2: cmd line int vect (see int vec table)
                    1534   1534 				;bits D3,D2,D1 are changed according to RX condition
07ac  d3 07         1535   1535 	out	(SIO_B_C),A
                    1536   1536 
07ae  3e 01         1537   1537 	ld	a,01h		;write into WR0: select WR1
07b0  d3 06         1538   1538 	out	(SIO_A_C),A
07b2  3e 18         1539   1539 	ld	a,00011000b	;interrupt on all RX characters, parity is not a spec RX condition
                    1540   1540 				;buffer overrun is a spec RX condition
07b4  d3 06         1541   1541 	out	(SIO_A_C),A
                    1542   1542 
                    1543   1543 SIO_A_EI:
                    1544   1544 	;enable SIO channel A RX
07b6  3e 03         1545   1545 	ld	a,003h		;write into WR0: select WR3
07b8  d3 06         1546   1546 	out	(SIO_A_C),A
                    1547   1547 ;	ld	a,0C1h		;RX 8bit, auto enable off, RX on
07ba  3e e1         1548   1548 	ld	a,0E1h		;RX 8bit, auto enable on, RX on	;v93
07bc  d3 06         1549   1549 	out	(SIO_A_C),A	
                    1550   1550 	;Channel A RX active
07be  c9            1551   1551 	RET
                    1552   1552 
                    1553   1553 
                    1554   1554 SIO_A_DI:
                    1555   1555 	;disable SIO channel A RX
07bf  3e 03         1556   1556 	ld	a,003h		;write into WR0: select WR3
07c1  d3 06         1557   1557 	out	(SIO_A_C),A
                    1558   1558 ;	ld	a,0C0h		;RX 8bit, auto enable off, RX off
07c3  3e e0         1559   1559 	ld	a,0E0h		;RX 8bit, auto enable on, RX off	;v93
07c5  d3 06         1560   1560 	out	(SIO_A_C),A	
Z80-Assembler		Release 1.4				Page 27
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1561   1561 	;Channel A RX inactive
07c7  c9            1562   1562 	ret
                    1563   1563 
                    1564   1564 A_RTS_OFF:
07c8  3e 05         1565   1565 	ld	a,005h		;write into WR0: select WR5
07ca  d3 06         1566   1566 	out	(SIO_A_C),A
07cc  3e e8         1567   1567 	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
07ce  d3 06         1568   1568 	out	(SIO_A_C),A
07d0  c9            1569   1569 	ret
                    1570   1570 	
                    1571   1571 A_RTS_ON:
07d1  3e 05         1572   1572 	ld	a,005h		;write into WR0: select WR5
07d3  d3 06         1573   1573 	out	(SIO_A_C),A
07d5  3e ea         1574   1574 	ld	a,0EAh		;DTR active, TX 8bit, BREAK off, TX on, RTS active
07d7  d3 06         1575   1575 	out	(SIO_A_C),A
07d9  c9            1576   1576 	ret
                    1577   1577 
                    1578   1578 
                    1579   1579 
                    1580   1580 ;-------SUBROUTINES BEGIN-------------------------------------------
                    1581   1581 ;-asks host for a number
                    1582   1582 ;-smallest unit is BYTE (so host must send at least 2 characters)
                    1583   1583 ;-half bytes are not accepted (e.g. it is invalid if host sends "123")
                    1584   1584 ;-in case of invalid input a return to EO_post_proc is performed (by manipulation of stack) !
                    1585   1585 ;-does not check content of characters (e.g. result of sending "nice" is unknown)
                    1586   1586 ;-the result of the last 2 characters in this number is returned in A
                    1587   1587 ;-the result of the last 4 characters in this number is returned in HL, wherein H holds high
                    1588   1588 ; byte and L holds low byte:
                    1589   1589 ; (e.g. sending "123456" returns A holding 56h, and HL holding 3456h)
                    1590   1590 ; all other characters get lost
                    1591   1591 ;-modifies all registers except the background registers
                    1592   1592 ;-loads every converted byte into long number storage (lowbyte at lowest address)
                    1593   1593 
                    1594   1594 req_number:	;call 	set_CMD_incpl	;clear CMD status	;comm. V841
                    1595   1595 		;call	SIO_A_EI
                    1596   1596 		;ei			;comm. V841
07da  cd 6e 07      1597   1597 		call	poll_CMD_cpl
07dd  3a 1e 10      1598   1598 		ld	A,(IN_LEN)	;get lowbyte of IN_LEN
07e0  cb 3f         1599   1599 		srl	A		;divide by 2 / A holds number of words in input buffer
07e2  47            1600   1600 		ld	B,A		;copy into B
07e3  d2 f3 07      1601   1601 		jp	nc,l_133	;if IN_LEN was odd	
07e6  21 35 0d      1602   1602 		ld	HL,error	;TX ..?	
07e9  cd 17 08      1603   1603 		call	TX_STR
07ec  21 6d 04      1604   1604 		ld	HL,EO_post_proc	;replace return address on stack by address of EO_post_proc
07ef  33            1605   1605 		inc	SP		
07f0  33            1606   1606 		inc	SP
07f1  e5            1607   1607 		push	HL		
07f2  c9            1608   1608 		ret			;and return
                    1609   1609 		
07f3  11 20 10      1610   1610 l_133:		ld	DE,CMD_PTR
07f6  dd 21 80 10   1611   1611 		ld	IX,NUMBER	;IX points to beginning of long number storage
07fa  c5            1612   1612 l_132:		push	BC		;backup number of words on stack
07fb  cd 55 08      1613   1613 		call	conv_RX_2ASC2BIN;convert word in input buffer to byte , DE points to word
                    1614   1614 					;A holds result
07fe  dd 77 00      1615   1615 		ld	(IX+0),A	;load A into long number storage
0801  dd 23         1616   1616 		inc	IX		;advance pointer of long number storage by 1
0803  13            1617   1617 		inc	DE		;advance DE by two
0804  13            1618   1618 		inc	DE		;so that it point to next word in input buffer
0805  c1            1619   1619 		pop	BC		;restore number of words from stack
0806  cb 40         1620   1620 		bit	0,B		;check for last cycle: bit 0 of counter is set in last cycle
Z80-Assembler		Release 1.4				Page 28
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0808  c2 0c 08      1621   1621 		jp	nz,l_135
080b  67            1622   1622 		ld	H,A
080c  10 ec         1623   1623 l_135:		djnz	l_132		;loop to l_132 until all words are read from buffer
080e  6f            1624   1624 		ld	L,A
080f  c9            1625   1625 		ret			;return
                    1626   1626 				
                    1627   1627 
                    1628   1628 
                    1629   1629 
                    1630   1630 
                    1631   1631 
                    1632   1632 
                    1633   1633 
                    1634   1634 
                    1635   1635 ;-----------------------------------------------------
                    1636   1636 
                    1637   1637 
                    1638   1638 ;TX_STR_TERM:
                    1639   1639 	;modifies HL, A
                    1640   1640 ;	ld	HL,STR_TERM
                    1641   1641 ;	call	TX_STR
                    1642   1642 ;	ret
                    1643   1643 
                    1644   1644 	
                    1645   1645 TX_STD_OUT:
0810  21 40 10      1646   1646 	ld	HL,STD_OUT
0813  cd 17 08      1647   1647 	call	TX_STR
                    1648   1648 ;	call	TX_STR_TERM
0816  c9            1649   1649 	ret
                    1650   1650 
                    1651   1651 TX_STR: ;TX string, HL points to first byte address
                    1652   1652 	;modifies A, HL , BC
0817  7e            1653   1653 TX_CHA:	ld	a,(HL)
0818  d3 04         1654   1654 	out	(SIO_A_D),A
081a  cd 2a 08      1655   1655 	call	TX_EMP
                    1656   1656 ;	call	host_rdy
081d  97            1657   1657 	sub	a
081e  ed a1         1658   1658 	cpi		;look for string termination character 0h
0820  c2 17 08      1659   1659 	jp	nz,TX_CHA
0823  32 0b 10      1660   1660 	ld	(OUT_LEN),A	;set output string length lowbyte to 0
0826  32 0c 10      1661   1661 	ld	(OUT_LEN+1),A	;set output string length highbyte to 0
0829  c9            1662   1662 	ret
                    1663   1663 
                    1664   1664 
                    1665   1665 TX_EMP:	; check for TX buffer empty
                    1666   1666 	;modifies A
082a  97            1667   1667 	sub	a		;clear a, write into WR0: select RR0
082b  3c            1668   1668 	inc	a		;select RR1
082c  d3 06         1669   1669 	out	(SIO_A_C),A
082e  db 06         1670   1670 	in	A,(SIO_A_C)		;read RRx
0830  cb 47         1671   1671 	bit	0,A
0832  ca 2a 08      1672   1672 	jp	z,TX_EMP
0835  c9            1673   1673 	ret
                    1674   1674 	
                    1675   1675 RX_EMP:	; check for RX buffer empty
                    1676   1676 	;modifies A
0836  97            1677   1677 	sub	a		;clear a, write into WR0: select RR0
0837  d3 06         1678   1678 	out	(SIO_A_C),A
0839  db 06         1679   1679 	in	A,(SIO_A_C)	;read RRx
083b  cb 47         1680   1680 	bit	0,A
Z80-Assembler		Release 1.4				Page 29
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
083d  c8            1681   1681 	ret	z          	;if any rx char left in rx buffer
083e  db 04         1682   1682 	in	A,(SIO_A_D)     ;read that char
0840  c3 36 08      1683   1683 	jp	RX_EMP
                    1684   1684 
                    1685   1685 
                    1686   1686 ;v93
                    1687   1687 ;host_rdy:
                    1688   1688 ;	ld	a,10h		; write cmd 2 into WR0: select RR0
                    1689   1689 ;	out	(SIO_A_C),A
                    1690   1690 ;l_551:	in	A,(SIO_A_C)		;read RR0
                    1691   1691 ;	bit	5,A	;when host ready bit 5 (CTS) is H
                    1692   1692 ;	jp	z,l_551
                    1693   1693 ;	ret
                    1694   1694 	
                    1695   1695 ;---------------------------------------------------
                    1696   1696 
                    1697   1697 
                    1698   1698 
                    1699   1699 
                    1700   1700 
                    1701   1701 
                    1702   1702 
                    1703   1703 
                    1704   1704 
                    1705   1705 ;-------delay----------------
                    1706   1706 
                    1707   1707 WAIT_2:	; delay
0843  f5            1708   1708 	push	AF
0844  c5            1709   1709 	push	BC
0845  d5            1710   1710 	push	DE
0846  11 00 05      1711   1711 	ld	de,0500h
0849  10 fe         1712   1712 l_W20:	djnz	l_W20
084b  1b            1713   1713 	dec 	de
084c  7a            1714   1714         ld     	a,d
084d  b7            1715   1715         or     	a      ;update zero flag
084e  c2 49 08      1716   1716 	jp	nz,l_W20
0851  d1            1717   1717 	pop	DE
0852  c1            1718   1718 	pop	BC
0853  f1            1719   1719 	pop	AF
0854  c9            1720   1720         ret
                    1721   1721 
                    1722   1722 
                    1723   1723 
                    1724   1724 
                    1725   1725 
                    1726   1726 
                    1727   1727 
                    1728   1728 
                    1729   1729 
                    1730   1730 
                    1731   1731 ;-------convert 2 received ASCII char to byte begin-----------------------------
                    1732   1732 ;	DE points to input in CMD_PTR and CMD_PTR+1
                    1733   1733 ;	output in A
                    1734   1734 ;	modifies A, B  
                    1735   1735 conv_RX_2ASC2BIN:
                    1736   1736 		;ld	DE,CMD_PTR	;read first char in cmd buffer
0855  d5            1737   1737 		push	DE		;came with V783
0856  1a            1738   1738 		ld	A,(DE)
0857  cb 77         1739   1739 		bit	6,A
0859  ca 61 08      1740   1740 		jp	z,hi_ni_09	;if bit 6 not set,it's below Ah
Z80-Assembler		Release 1.4				Page 30
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
085c  c6 09         1741   1741 		add	A,9h
085e  c3 63 08      1742   1742 		jp	sh_4xl
0861  d6 30         1743   1743 hi_ni_09:	sub	30h		;convert to 4 bit number
0863  cb 27         1744   1744 sh_4xl:		sla	A
0865  cb 27         1745   1745 		sla	A
0867  cb 27         1746   1746 		sla	A
0869  cb 27         1747   1747 		sla	A
086b  47            1748   1748 		ld	B,A		;B[7..4] hold high nibble 
                    1749   1749 
086c  13            1750   1750 		inc	DE		;read 2nd char in cmd buffer
086d  1a            1751   1751 		ld	A,(DE)
086e  cb 77         1752   1752 		bit	6,A
0870  ca 7a 08      1753   1753 		jp	z,lo_ni_09	;if bit 6 not set,it's below Ah
0873  c6 09         1754   1754 		add	A,9h
0875  e6 0f         1755   1755 		and	0Fh
0877  c3 7c 08      1756   1756 		jp	EO_conv_RX_2ASC2BIN
087a  d6 30         1757   1757 lo_ni_09:	sub	30h		;convert to 4 bit number
                    1758   1758 
                    1759   1759 EO_conv_RX_2ASC2BIN:
087c  b0            1760   1760 		or	B		;A holds result
087d  d1            1761   1761 		pop	DE		;came with V783
087e  c9            1762   1762 		RET
                    1763   1763 ;-------convert 2 received ASCII char to byte end----------------------------
                    1764   1764 
                    1765   1765 
                    1766   1766 
                    1767   1767 
                    1768   1768 
                    1769   1769 ;-------convert byte to 2 ASCII char begin---------------------------
                    1770   1770 ;	input value in A
                    1771   1771 ;	output high nibble in D, low nibble in C
                    1772   1772 ; modifies A,BC,D
                    1773   1773 
                    1774   1774 conv_BYTE2ASC:
087f  4f            1775   1775 		ld	C,A		;backup given byte in C
                    1776   1776 
                    1777   1777 proc_hi_ni:	;process high nibble
0880  e6 f0         1778   1778 		and	0F0h		;clear low nibble
0882  cb 3f         1779   1779 		srl	A		;move high nibble into low nibble
0884  cb 3f         1780   1780 		srl	A
0886  cb 3f         1781   1781 		srl	A
0888  cb 3f         1782   1782 		srl	A
                    1783   1783 
088a  47            1784   1784 		ld	B,A		;backup A in B
088b  3e 09         1785   1785 		ld	A,9		
088d  90            1786   1786 		sub	B
088e  da 97 08      1787   1787 		jp	c,ni_AF		;nibble > 9 ?
0891  78            1788   1788 		ld	A,B		;restore nibble
0892  c6 30         1789   1789 		add	A,30h		;add 30h to make ASCII char
0894  c3 9a 08      1790   1790 		jp	hi_ni_rdy
0897  78            1791   1791 ni_AF:		ld	A,B		;restore nibble
0898  c6 37         1792   1792 		add	A,37h		;add 40h-9h to make ASCII char
089a  57            1793   1793 hi_ni_rdy:	ld	D,A		;high nibble ready in D
                    1794   1794 
                    1795   1795 
                    1796   1796 		;process low nibble
089b  79            1797   1797 		ld	A,C		;restore given byte from C
089c  e6 0f         1798   1798 		and	0Fh		;clear high nibble
089e  47            1799   1799 		ld	B,A		;backup A in B
089f  3e 09         1800   1800 		ld	A,9		
Z80-Assembler		Release 1.4				Page 31
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
08a1  90            1801   1801 		sub	B
08a2  da ab 08      1802   1802 		jp	c,ni_AF2	;nibble > 9 ?
08a5  78            1803   1803 		ld	A,B		;restore nibble
08a6  c6 30         1804   1804 		add	A,30h		;add 30h to make ASCII char
08a8  c3 ae 08      1805   1805 		jp	lo_ni_rdy
08ab  78            1806   1806 ni_AF2:		ld	A,B		;restore nibble
08ac  c6 37         1807   1807 		add	A,37h		;add 40h-9h to make ASCII char
08ae  4f            1808   1808 lo_ni_rdy:	ld	C,A		;low nibble ready in C
                    1809   1809 					;high nibble ready in D
08af  c9            1810   1810 		RET		
                    1811   1811 ;-------convert byte to 2 ASCII char end---------------------------
                    1812   1812 
                    1813   1813 
                    1814   1814 
                    1815   1815 
                    1816   1816 
                    1817   1817 
                    1818   1818 
                    1819   1819 
                    1820   1820 
                    1821   1821 
                    1822   1822 
                    1823   1823 ;-------RAM size check begin---------------------------------
                    1824   1824 RAM_SIZE_CHK:
                    1825   1825 
08b0  21 00 18      1826   1826 	ld	HL,RAM_BOT	;get RAM bottom as start value
08b3  37            1827   1827     	scf			;set carry flag
08b4  3f            1828   1828 	ccf			;comlpement carry flag
                    1829   1829 l_ER0:	
08b5  06 01         1830   1830 	ld	B,1h		;walking one starts at LSB
                    1831   1831 WALK_1:	
08b7  78            1832   1832 	ld	A,B		;copy to A
08b8  77            1833   1833 	ld	(HL),A		;write shift value into RAM
08b9  7e            1834   1834 	ld	A,(HL)		;read shift value back from RAM
08ba  b8            1835   1835 	cp	B
08bb  c2 c9 08      1836   1836 	jp	nz,RAM_RANGE	;if mismatch, top of RAM+1 reached
08be  cb 20         1837   1837 	sla	B
08c0  d2 b7 08      1838   1838 	jp	nc,WALK_1
                    1839   1839 
08c3  97            1840   1840 	sub	A		;clean up RAM location
08c4  77            1841   1841 	ld	(HL),A
                    1842   1842 
08c5  23            1843   1843 	inc	HL		;inc RAM address
08c6  c3 b5 08      1844   1844 	jp	l_ER0
                    1845   1845 		
                    1846   1846 RAM_RANGE:
08c9  2b            1847   1847 	dec	HL		;last checked address - 1
08ca  22 07 10      1848   1848 	ld	(RAM_TOP),HL
08cd  7c            1849   1849 	ld	A,H
08ce  cd dc 08      1850   1850 	call	APP_ACCU
08d1  2a 07 10      1851   1851 	ld	HL,(RAM_TOP)
08d4  7d            1852   1852 	ld	A,L
08d5  cd dc 08      1853   1853 	call	APP_ACCU
08d8  cd 10 08      1854   1854 	call	TX_STD_OUT
08db  c9            1855   1855 	ret	
                    1856   1856 ;--------RAM size check end -----------------------------------------------
                    1857   1857 
                    1858   1858 
                    1859   1859 
                    1860   1860 
Z80-Assembler		Release 1.4				Page 32
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1861   1861 
                    1862   1862 
                    1863   1863 
                    1864   1864 ;--------------------------------------------------------------------------
                    1865   1865 APP_ACCU:
                    1866   1866 	;converts A content into 2 ASCII characters in C and D
                    1867   1867 	;C holds low nibble, D holds high nibble
                    1868   1868 	;appends characters in C and D to STD_OUT
                    1869   1869 	;appends 0h as string termination
                    1870   1870 	;increments OUT_LEN by two
                    1871   1871 	;modifies A,BC,DE,IX,IY
                    1872   1872 
08dc  cd 7f 08      1873   1873 	call	conv_BYTE2ASC	;converts A to 2xASCII chars in D and C
08df  41            1874   1874 	ld	B,C
08e0  4a            1875   1875 	ld	C,D		;high nibble in C, low nibble in B
08e1  37            1876   1876 	scf			;set carry flag
                    1877   1877 APP_CHAR:
                    1878   1878 	;requires char to append in C
                    1879   1879 	;returns at label l_933 if carry not set
08e2  f5            1880   1880 	push	AF		;backup carry status
08e3  dd 21 40 10   1881   1881 	ld	IX,STD_OUT	;IX points to STD_OUT begin
                    1882   1882 	;ld	A,(OUT_LEN)	;get current output string length
08e7  ed 5b 0b 10   1883   1883 	ld	DE,(OUT_LEN)	;get current output string length
08eb  fd 21 0b 10   1884   1884 	ld	IY,OUT_LEN	;IY points to OUT_LEN
                    1885   1885 	;ld	D,0h
                    1886   1886 	;ld	E,A
08ef  dd 19         1887   1887 	add	IX,DE		;IX points to last pos in string
                    1888   1888 
08f1  dd 71 00      1889   1889 	ld	(IX+0),C	;append C to string
08f4  fd 34 00      1890   1890 	inc	(IY+0)		;OUT_LEN+1
08f7  dd 36 01 00   1891   1891 	ld	(IX+1),0h	;append termination string
08fb  f1            1892   1892 	pop	AF		;restore carry status
08fc  d0            1893   1893 l_933:	ret	nc		;return if carry not set
                    1894   1894 
08fd  dd 70 01      1895   1895 	ld	(IX+1),B	;else append B to string (overwrite former termination)
0900  fd 34 00      1896   1896 	inc	(IY+0)		;OUT_LEN+1
0903  dd 36 02 00   1897   1897 	ld	(IX+2),0h	;append termination to string
0907  c9            1898   1898 	RET
                    1899   1899 
                    1900   1900 ;---------------------------------------------------------------------
                    1901   1901 
                    1902   1902 
                    1903   1903 
                    1904   1904 READ_MEM:	;reads memory content starting where HL points to
                    1905   1905 		;transmits row by row, so STD_OUT holds max.  52d characters
                    1906   1906 		;modifies all registers !
0908  06 10         1907   1907 		ld	B,10h		;read 16 lines
090a  c5            1908   1908 RD_HL_ROW:	push	BC
                    1909   1909 
                    1910   1910 		;load first address of first row in STD_OUT
090b  7c            1911   1911 		ld	A,H		;append high byte of mem address
090c  d9            1912   1912 		EXX			;backup HL in background register
090d  cd dc 08      1913   1913 		call	APP_ACCU
0910  d9            1914   1914 		EXX			;restore HL from background register
0911  7d            1915   1915 		ld	A,L		;append low byte of mem address
0912  d9            1916   1916 		EXX			;backup HL in background register
0913  cd dc 08      1917   1917 		call	APP_ACCU
0916  37            1918   1918 		scf			;add space character
0917  3f            1919   1919 		ccf
0918  0e 20         1920   1920 		ld	C,020h
Z80-Assembler		Release 1.4				Page 33
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
091a  cd e2 08      1921   1921 		call	APP_CHAR
091d  d9            1922   1922 		EXX			;restore HL from background register
                    1923   1923 		;first address of first row ready in STD_OUT
                    1924   1924 
091e  06 10         1925   1925 		ld	B,10h		;read 16 columns
0920  7e            1926   1926 RD_HL_COL:	ld	A,(HL)		;read memory content into A
0921  d9            1927   1927 		EXX			;backup HL in background register
0922  cd dc 08      1928   1928 		call	APP_ACCU
0925  37            1929   1929 		scf			;append space character
0926  3f            1930   1930 		ccf
0927  0e 20         1931   1931 		ld	C,020h
0929  cd e2 08      1932   1932 		call	APP_CHAR
092c  d9            1933   1933 		EXX			;restore HL from background register
092d  23            1934   1934 		inc	HL		;HL points to next mem position	
092e  10 f0         1935   1935 		djnz	RD_HL_COL	;loop until 16 columns are read
0930  d9            1936   1936 		EXX			;backup HL in background register
0931  cd 10 08      1937   1937 		call	TX_STD_OUT	;TX row to host
0934  21 85 0e      1938   1938 		ld	HL,NEW_LINE	;transmit new line
0937  cd 17 08      1939   1939 		call	TX_STR
093a  d9            1940   1940 		EXX			;restore HL from background register
093b  c1            1941   1941 		pop	BC		;restore BC from stack
093c  10 cc         1942   1942 		djnz	RD_HL_ROW	;loop until 16 rows are read
093e  c9            1943   1943 		ret
                    1944   1944 
                    1945   1945 ;----------------------------------------------------------------------------
                    1946   1946 div_by_2:	
                    1947   1947 ;divides content of BC by 2
                    1948   1948 ;writes the result back into BC !
                    1949   1949 ;modifies BC
093f  cb 38         1950   1950 		srl	B
0941  da 47 09      1951   1951 		jp	c,l_713
0944  cb 39         1952   1952 		srl	C
0946  c9            1953   1953 		ret
0947  cb 39         1954   1954 l_713:		srl	C
0949  cb f9         1955   1955 		set	7,C
094b  c9            1956   1956 		ret
                    1957   1957 
                    1958   1958 
                    1959   1959 	
                    1960   1960 
                    1961   1961 ;----------------------------------------------------------------------------
                    1962   1962 TX_NUMBER:
                    1963   1963 ;transfers long number to host
                    1964   1964 ;HL points to low byte of number
                    1965   1965 ;BC holds number of bytes
                    1966   1966 ;modifies A, HL, BC
094c  09            1967   1967 		add	HL,BC		
094d  2b            1968   1968 l_844:		dec	HL		;HL points to high byte of number
094e  7e            1969   1969 		ld	A,(HL)
094f  c5            1970   1970 		push	BC
0950  cd dc 08      1971   1971 		call	APP_ACCU	;append byte to STD_OUT
0953  c1            1972   1972 		pop	BC
0954  0b            1973   1973 		dec	BC		;number of bytes - 1
0955  78            1974   1974 		ld	A,B
0956  fe 00         1975   1975 		cp	0		;test high byte of BC for 0
0958  c2 4d 09      1976   1976 		jp	nz,l_844	;if yes,
095b  79            1977   1977 		ld	A,C		
095c  fe 00         1978   1978 		cp	0		;test low byte of BC for 0
095e  c2 4d 09      1979   1979 		jp	nz,l_844	;if yes,
0961  cd 10 08      1980   1980 		call	TX_STD_OUT	;TX input value to host
Z80-Assembler		Release 1.4				Page 34
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0964  c9            1981   1981 		ret
                    1982   1982 ;-----------------------------------------------------------------------------
                    1983   1983 
                    1984   1984 
                    1985   1985 
                    1986   1986 
                    1987   1987 req_snd:	;requests source, number, destination address
0965  21 44 0d      1988   1988 		ld	HL,source16
0968  cd 17 08      1989   1989 		call	TX_STR
                    1990   1990 ;		call	TX_STR_TERM
096b  cd da 07      1991   1991 		call	req_number	;get source address from host
096e  22 0f 10      1992   1992 		ld	(SOURCE_ADR),HL
                    1993   1993 req_nd:
0971  21 63 0d      1994   1994 		ld	HL,count16
0974  cd 17 08      1995   1995 		call	TX_STR
                    1996   1996 ;		call	TX_STR_TERM
0977  cd da 07      1997   1997 		call	req_number	;get number of bytes to burn from host
097a  22 13 10      1998   1998 		ld	(NUMB_OF_BYTES),HL
                    1999   1999 req_d:
097d  21 51 0d      2000   2000 		ld	HL,destin16
0980  cd 17 08      2001   2001 		call	TX_STR
                    2002   2002 ;		call	TX_STR_TERM
0983  cd da 07      2003   2003 		call	req_number	;get destination address from host
0986  22 11 10      2004   2004 		ld	(DEST_ADR),HL
                    2005   2005 
                    2006   2006 		;prepare block transfer and search commands like ldi, cpi, cpir, ldir
0989  2a 0f 10      2007   2007 		ld	HL,(SOURCE_ADR)
098c  ed 5b 11 10   2008   2008 		ld	DE,(DEST_ADR)
0990  ed 4b 13 10   2009   2009 		ld	BC,(NUMB_OF_BYTES)
0994  c9            2010   2010 		ret
                    2011   2011 
                    2012   2012 
                    2013   2013 
                    2014   2014 
0995  21 75 0d      2015   2015 fill_mem:	ld	HL,new_dat
0998  cd 17 08      2016   2016 		call	TX_STR
                    2017   2017 ;		call	TX_STR_TERM
099b  cd da 07      2018   2018 		call	req_number	;get fill value from host
099e  32 01 10      2019   2019 		ld	(SCRATCH),A	;save fill value in scratch
                    2020   2020 
09a1  cd 71 09      2021   2021 		call	req_nd		;request number, destination address
                    2022   2022 		
09a4  ed 5b 11 10   2023   2023 		ld	DE,(DEST_ADR)
09a8  ed 4b 13 10   2024   2024 		ld	BC,(NUMB_OF_BYTES)
                    2025   2025 l_fi0:
09ac  21 01 10      2026   2026 		ld	HL,SCRATCH	;set source pointer to scratch
09af  ed a0         2027   2027 		ldi			;copy fill value (from scratch) to destination address
09b1  ea ac 09      2028   2028 		jp	pe,l_fi0	;loop until block filled
09b4  c9            2029   2029 		ret
                    2030   2030 
                    2031   2031 
                    2032   2032 cmp_mem:
                    2033   2033 		;ld	HL,(SOURCE_ADR)
                    2034   2034 		;ld	DE,(DEST_ADR)
                    2035   2035 		;ld	BC,(NUMB_OF_BYTES)
09b5  1a            2036   2036 l_cmp0:		ld	A,(DE)		;load data at dest. address into A
09b6  32 01 10      2037   2037 		ld	(SCRATCH),A	;place copy of data in scratch
09b9  ed a1         2038   2038 		cpi			;cmp data at source address with data at dest. addr.
09bb  c2 c3 09      2039   2039 		jp	nz,l_cmp_err
09be  13            2040   2040 		inc	DE		;advance dest. pointer
Z80-Assembler		Release 1.4				Page 35
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
09bf  ea b5 09      2041   2041 		jp	pe,l_cmp0	;loop until byte counter bc is 0
09c2  c9            2042   2042 		ret
09c3  2b            2043   2043 l_cmp_err:	dec	HL		;set source pointer back at address where error occured
09c4  e5            2044   2044 		push 	HL		;save current source address
09c5  d5            2045   2045 		push	DE		;save current dest. address
                    2046   2046 
09c6  21 35 0d      2047   2047 		ld	HL,error	;tx "..?"
09c9  cd 17 08      2048   2048 		call	TX_STR
09cc  21 41 0e      2049   2049 		ld	HL,at		;tx "at"
09cf  cd 17 08      2050   2050 		call	TX_STR
                    2051   2051 
09d2  d1            2052   2052 		pop	DE		;restore current dest. address
09d3  7a            2053   2053 		ld	A,D
09d4  d5            2054   2054 		push	DE
09d5  cd dc 08      2055   2055 		call	APP_ACCU
09d8  d1            2056   2056 		pop	DE
09d9  7b            2057   2057 		ld	A,E
09da  cd dc 08      2058   2058 		call	APP_ACCU
09dd  cd 10 08      2059   2059 		call	TX_STD_OUT	;tx current dest. address to host
                    2060   2060 		
09e0  21 47 0e      2061   2061 		ld	HL,expect	;tx "exp:" to host
09e3  cd 17 08      2062   2062 		call	TX_STR
09e6  e1            2063   2063 		pop	HL		;restore current source address
09e7  7e            2064   2064 		ld	A,(HL)
09e8  cd dc 08      2065   2065 		call	APP_ACCU
09eb  cd 10 08      2066   2066 		call	TX_STD_OUT	;tx current source address to host
                    2067   2067 		
09ee  21 53 0e      2068   2068 		ld	HL,read		;tx "read:"
09f1  cd 17 08      2069   2069 		call	TX_STR	
                    2070   2070 
09f4  3a 01 10      2071   2071 		ld	A,(SCRATCH)	;restore from scratch data read at dest. address
09f7  cd dc 08      2072   2072 		call	APP_ACCU
09fa  cd 10 08      2073   2073 		call	TX_STD_OUT	;tx corrupted data to host
                    2074   2074 
09fd  c9            2075   2075 		ret
                    2076   2076 
                    2077   2077 		
                    2078   2078 fl_prog:	;programs data into flash page wise
09fe  21 85 0e      2079   2079 		ld	HL,NEW_LINE	;transmit new line
0a01  cd 17 08      2080   2080 		call	TX_STR
0a04  21 3a 0e      2081   2081 		ld	HL,page
0a07  cd 17 08      2082   2082 		call	TX_STR
0a0a  97            2083   2083 		sub	A
0a0b  32 01 10      2084   2084 		ld	(SCRATCH),A	;clear scratch
0a0e  2a 0f 10      2085   2085 		ld	HL,(SOURCE_ADR)
0a11  ed 5b 11 10   2086   2086 		ld	DE,(DEST_ADR)
0a15  ed 4b 13 10   2087   2087 		ld	BC,(NUMB_OF_BYTES)
0a19  3e 80         2088   2088 l_prg0:		ld	A,80h		;per page are 80h bytes to load
0a1b  cd 31 0a      2089   2089 		call	tx_byte_count	;tx byte count
0a1e  3d            2090   2090 l_prg2:		dec	A		;first byte of page has number 7Fh, last byte has 0h
0a1f  ed a0         2091   2091 		ldi			;copy source_adr to dest_adr, dec bc
0a21  e2 2d 0a      2092   2092 		jp	po,l_prg3	;exit if no more bytes are left to load
0a24  c2 1e 0a      2093   2093 		jp	nz,l_prg2	;loop until page full
0a27  cd cd 0a      2094   2094 		call	l_pa30ms	;pause 30ms when page full
0a2a  c3 19 0a      2095   2095 		jp	l_prg0
0a2d  cd be 0a      2096   2096 l_prg3:		call	l_pa170ms	;pause 170ms
0a30  c9            2097   2097 		ret		
                    2098   2098 
0a31  f5            2099   2099 tx_byte_count:	push 	AF
0a32  d5            2100   2100 		push	DE
Z80-Assembler		Release 1.4				Page 36
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0a33  e5            2101   2101 		push	HL
0a34  c5            2102   2102 		push	BC
                    2103   2103 		
0a35  3a 01 10      2104   2104 		ld	A,(SCRATCH)
                    2105   2105 		;inc	A
                    2106   2106 		;ld	(SCRATCH),A
0a38  cd dc 08      2107   2107 		call	APP_ACCU
0a3b  cd 10 08      2108   2108 		call	TX_STD_OUT	;tx page count to host		
0a3e  3a 01 10      2109   2109 		ld	A,(SCRATCH)
0a41  3c            2110   2110 		inc	A
0a42  32 01 10      2111   2111 		ld	(SCRATCH),A
                    2112   2112 
                    2113   2113 
0a45  21 8c 0e      2114   2114 		ld	HL,2xBS		;backspace 2 times to overwrite last output
0a48  cd 17 08      2115   2115 		call	TX_STR
                    2116   2116 
0a4b  c1            2117   2117 		pop	BC
0a4c  e1            2118   2118 		pop	HL
0a4d  d1            2119   2119 		pop	DE
0a4e  f1            2120   2120 		pop	AF
0a4f  c9            2121   2121 		ret
                    2122   2122 
                    2123   2123 
                    2124   2124 
                    2125   2125 
                    2126   2126 
                    2127   2127 prot_off:	;disables software data protection
0a50  cd dc 0a      2128   2128 		call	l_AA55
0a53  3e 80         2129   2129 		ld	A,080h
0a55  32 55 d5      2130   2130 		ld	(0D555h),A	;5555h
0a58  cd dc 0a      2131   2131 		call	l_AA55
0a5b  3e 20         2132   2132 		ld	A,020h
0a5d  32 55 d5      2133   2133 		ld	(0D555h),A	;5555h
0a60  cd be 0a      2134   2134 		call	l_pa170ms
0a63  c9            2135   2135 		ret
                    2136   2136 
                    2137   2137 prot_on:	;enables software data protection
0a64  cd dc 0a      2138   2138 		call	l_AA55
0a67  3e a0         2139   2139 		ld	A,0A0h
0a69  32 55 d5      2140   2140 		ld	(0D555h),A	;5555h
0a6c  cd be 0a      2141   2141 		call	l_pa170ms
0a6f  c9            2142   2142 		ret
                    2143   2143 
                    2144   2144 fl_erase:	;erases complete flash
0a70  cd dc 0a      2145   2145 		call	l_AA55
0a73  3e 80         2146   2146 		ld	A,080h
0a75  32 55 d5      2147   2147 		ld	(0D555h),A	;5555h
0a78  cd dc 0a      2148   2148 		call	l_AA55
0a7b  3e 10         2149   2149 		ld	A,010h
0a7d  32 55 d5      2150   2150 		ld	(0D555h),A	;5555h
0a80  cd be 0a      2151   2151 		call	l_pa170ms
0a83  c9            2152   2152 		ret
                    2153   2153 
                    2154   2154 
                    2155   2155 id_check:	;reads flash id code. must be DA45h for W29C020 type
                    2156   2156 		;modifies all registers
                    2157   2157 		
0a84  21 2f 0e      2158   2158 		ld	HL,fl_id
0a87  cd 17 08      2159   2159 		call	TX_STR
                    2160   2160 				
Z80-Assembler		Release 1.4				Page 37
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2161   2161 		;product id entry
0a8a  cd dc 0a      2162   2162 		call	l_AA55
0a8d  3e 80         2163   2163 		ld	A,080h
0a8f  32 55 d5      2164   2164 		ld	(0D555h),A	;5555h
0a92  cd dc 0a      2165   2165 		call	l_AA55
0a95  3e 60         2166   2166 		ld	A,060h
0a97  32 55 d5      2167   2167 		ld	(0D555h),A	;5555h
0a9a  cd be 0a      2168   2168 		call	l_pa170ms
                    2169   2169 		
                    2170   2170 		;product id and boot block lockout detection mode
0a9d  3a 00 80      2171   2171 		ld	A,(08000h)	;0h
0aa0  cd dc 08      2172   2172 		call	APP_ACCU
0aa3  3a 01 80      2173   2173 		ld	A,(08001h)	;1h
0aa6  cd dc 08      2174   2174 		call	APP_ACCU
                    2175   2175 
0aa9  3a 02 80      2176   2176 		ld	A,(08002h)	;2h (for lower boot block lockout detection)
0aac  cd dc 08      2177   2177 		call	APP_ACCU
0aaf  cd 10 08      2178   2178 		call	TX_STD_OUT	;TX id code to host
                    2179   2179 
                    2180   2180 		;product id exit
0ab2  cd dc 0a      2181   2181 		call	l_AA55
0ab5  3e f0         2182   2182 		ld	A,0F0h
0ab7  32 55 d5      2183   2183 		ld	(0D555h),A	;5555h
0aba  cd be 0a      2184   2184 		call	l_pa170ms
                    2185   2185 
                    2186   2186 		;normal mode reached
0abd  c9            2187   2187 		ret
                    2188   2188 
                    2189   2189 
                    2190   2190 		
                    2191   2191 l_pa170ms:	;pause 170ms at 2,5Mhz
0abe  f5            2192   2192 		push	AF		;save AF on stack
0abf  c5            2193   2193 		push	BC		;save BC on stack
0ac0  3e 80         2194   2194 		ld	A,080h	
0ac2  06 00         2195   2195 		ld	B,0h
0ac4  10 fe         2196   2196 l_133ms:	djnz	l_133ms		;1.33ms at 2,5Mhz
0ac6  3d            2197   2197 		dec	A
0ac7  c2 c4 0a      2198   2198 		jp	nz,l_133ms
0aca  c1            2199   2199 		pop	BC		;restore BC
0acb  f1            2200   2200 		pop	AF		;restore AF	
0acc  c9            2201   2201 		ret
                    2202   2202 		
                    2203   2203 
                    2204   2204 l_pa30ms:	;pause 30ms at 2,5Mhz
0acd  f5            2205   2205 		push	AF		;save AF on stack
0ace  c5            2206   2206 		push	BC		;save BC on stack
0acf  3e 1a         2207   2207 		ld	A,01Ah	
0ad1  06 00         2208   2208 		ld	B,0h
0ad3  10 fe         2209   2209 l_a133ms:	djnz	l_a133ms	;1.33ms at 2,5Mhz
0ad5  3d            2210   2210 		dec	A
0ad6  c2 d3 0a      2211   2211 		jp	nz,l_a133ms
0ad9  c1            2212   2212 		pop	BC		;restore BC
0ada  f1            2213   2213 		pop	AF		;restore AF	
0adb  c9            2214   2214 		ret
                    2215   2215 
                    2216   2216 
                    2217   2217 l_AA55:		;modifies A
0adc  3e aa         2218   2218 		ld	A,0AAh
0ade  32 55 d5      2219   2219 		ld	(0D555h),A	;5555h
0ae1  3e 55         2220   2220 		ld	A,055h
Z80-Assembler		Release 1.4				Page 38
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0ae3  32 aa aa      2221   2221 		ld	(0AAAAh),A	;2AAAh
0ae6  c9            2222   2222 		ret
                    2223   2223 
                    2224   2224 
                    2225   2225 
                    2226   2226 
                    2227   2227 
                    2228   2228 ;-----------I2C Bus 1 test ----------------------------------------------------------
                    2229   2229 i1test:
                    2230   2230 		;init error code
0ae7  dd 21 15 10   2231   2231 		ld	IX,temp0
0aeb  dd 36 00 00   2232   2232 		ld	(IX+0),0	;preload error code
0aef  dd 36 01 05   2233   2233 		ld	(IX+1),05h	;preload test data counter (5 x write/read)
                    2234   2234 		
0af3  fd 21 01 10   2235   2235 		ld	IY,scratch
0af7  fd 36 00 f0   2236   2236 		ld	(IY+0),0F0h	;set duration of i2c expander test
                    2237   2237 
                    2238   2238 ;--------------write test data into flash--------------------------
0afb  21 5b 0e      2239   2239 		ld 	HL,i2cflash
0afe  cd 17 08      2240   2240 		call	TX_STR
0b01  21 85 0e      2241   2241 	    	ld	HL,NEW_LINE	;transmit new line
0b04  cd 17 08      2242   2242 		call	TX_STR
                    2243   2243 
                    2244   2244 
0b07  cd c4 06      2245   2245 l_150:		call	I2C1_START
                    2246   2246 
0b0a  3e a0         2247   2247 		ld	A,0A0h		;load i2c flash dev code
0b0c  cd 95 05      2248   2248 		call	I2C1_tx
0b0f  da 19 0b      2249   2249 		jp	c,l_151		;if no ackn error go l_151
0b12  dd 36 00 10   2250   2250 		ld	(IX+0),10h	;set err code to 10h (ackn error on flash dev select)
0b16  c3 c6 0b      2251   2251 		jp	EO_i1test
                    2252   2252 		
0b19  97            2253   2253 l_151:		sub	A		;address 0 is to be written
0b1a  cd 95 05      2254   2254 		call	I2C1_tx
0b1d  da 27 0b      2255   2255 		jp	c,l_152		;if no ackn error go l_152
0b20  dd 36 00 11   2256   2256 		ld	(IX+0),11h	;set err code to 11h (ackn error on flash mem addr select)
0b24  c3 c6 0b      2257   2257 		jp	EO_i1test
                    2258   2258 
0b27  dd 7e 01      2259   2259 l_152:		ld	A,(IX+1)	;write test data to mem address
0b2a  cd 95 05      2260   2260 		call	I2C1_tx
0b2d  da 37 0b      2261   2261 		jp	c,l_153		;if no ackn error go l_153
0b30  dd 36 00 12   2262   2262 		ld	(IX+0),12h	;set err code to 12h (ackn error on data write)
0b34  c3 c6 0b      2263   2263 		jp	EO_i1test
                    2264   2264 
0b37  cd d5 06      2265   2265 l_153:		call	I2C1_STOP
                    2266   2266 
                    2267   2267 ;--------------read test data from flash----------------------------
0b3a  cd 43 08      2268   2268 lesen:		call	wait_2
0b3d  cd c4 06      2269   2269 		call	I2C1_START
                    2270   2270 
0b40  3e a0         2271   2271 		ld	A,0A0h		;load i2c flash dev code
0b42  cd 95 05      2272   2272 		call	I2C1_tx
0b45  da 4f 0b      2273   2273 		jp	c,l_154		;if no ackn error go l_154
0b48  dd 36 00 13   2274   2274 		ld	(IX+0),13h	;set err code to 13h (ackn error on flash dev select)
0b4c  c3 c6 0b      2275   2275 		jp	EO_i1test
                    2276   2276 
0b4f  97            2277   2277 l_154:		sub	A		;address 0 is to be read		
0b50  cd 95 05      2278   2278 		call	I2C1_tx
                    2279   2279 ;		scf			;for
                    2280   2280 ;		ccf			;debug only !
Z80-Assembler		Release 1.4				Page 39
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0b53  da 5d 0b      2281   2281 		jp	c,l_1541	;if no ackn error go l_1541
0b56  dd 36 00 14   2282   2282 		ld	(IX+0),14h	;set err code to 14h (ackn error on flash mem addr select)
0b5a  c3 c6 0b      2283   2283 		jp	EO_i1test
                    2284   2284 		
                    2285   2285 l_1541:		;restart I2C bus 0
0b5d  cd 25 06      2286   2286 		call	SCL1_IN		;SCL0 = H
0b60  cd c4 06      2287   2287 		call	I2C1_START
                    2288   2288 
                    2289   2289 		;resend 8bit device select code
0b63  3e a1         2290   2290 		ld	a,0A1h		;load i2c flash dev code with r/w bit set
0b65  cd 95 05      2291   2291 		call	I2C1_tx
                    2292   2292 ;		scf			;for
                    2293   2293 ;		ccf			;debug only !
0b68  da 72 0b      2294   2294 		jp	c,l_1542	;if no ackn error go l_1542
0b6b  dd 36 00 15   2295   2295 		ld	(IX+0),15h	;set err code to 15h (ackn error on flash mem addr select)
0b6f  c3 c6 0b      2296   2296 		jp	EO_i1test
                    2297   2297 
0b72  cd a6 06      2298   2298 l_1542:		call	I2C1_RX		;returns with slave data byte in C
0b75  dd 7e 01      2299   2299 		ld	A,(IX+1)
                    2300   2300 ;		inc	A		;for debug only
0b78  b9            2301   2301 		cp	C
0b79  ca 83 0b      2302   2302 		jp	z,l_1543	;if no ackn error go l_1542
0b7c  dd 36 00 16   2303   2303 		ld	(IX+0),16h	;set err code to 16h (error on flash data read)
0b80  c3 c6 0b      2304   2304 		jp	EO_i1test
                    2305   2305 	
0b83  cd d5 06      2306   2306 l_1543:		call	I2C1_STOP
0b86  dd 35 01      2307   2307 		dec	(IX+1)		;test data counter - 1
                    2308   2308 					;when 0 reached i2c flash test done, leaving data 01h at 
                    2309   2309 					;address 00h of flash
0b89  c2 07 0b      2310   2310 		jp	nz,l_150
                    2311   2311 
                    2312   2312 ;-------------write to i2c expander------------------------------		
                    2313   2313 
0b8c  21 6a 0e      2314   2314 		ld 	HL,i2cpio	
0b8f  cd 17 08      2315   2315 		call	TX_STR
0b92  21 85 0e      2316   2316 	    	ld	HL,NEW_LINE	;transmit new line
0b95  cd 17 08      2317   2317 		call	TX_STR
                    2318   2318 
0b98  cd c4 06      2319   2319 		call	I2C1_START
                    2320   2320 
0b9b  3e 40         2321   2321 l_156:		ld	A,040h		;load i2c expander dev code
0b9d  cd 95 05      2322   2322 		call	I2C1_tx
0ba0  da aa 0b      2323   2323 		jp	c,l_155		;if no ackn error go l_155
0ba3  dd 36 00 17   2324   2324 		ld	(IX+0),17h	;set err code to 17h (ackn error on expander dev select)
0ba7  c3 c6 0b      2325   2325 		jp	EO_i1test
                    2326   2326 		
0baa  dd 7e 01      2327   2327 l_155:		ld	A,(IX+1)	;load test data into device
0bad  cd 95 05      2328   2328 		call	I2C1_tx
0bb0  da ba 0b      2329   2329 		jp	c,l_157		;if no ackn error go l_157
0bb3  dd 36 00 18   2330   2330 		ld	(IX+0),18h	;set err code to 18h (ackn error on expander data write)
0bb7  c3 c6 0b      2331   2331 		jp	EO_i1test
0bba  dd 34 01      2332   2332 l_157:		inc 	(IX+1)		;inc test data counter
0bbd  c2 aa 0b      2333   2333 		jp	nz,l_155	;end loop on overflow of test data counter
                    2334   2334 		
0bc0  fd 35 00      2335   2335 		dec	(IY+0)		;IY points to duration value of this test
0bc3  c2 aa 0b      2336   2336 		jp	nz,l_155	
                    2337   2337 		;FFh is left on data port of expander
                    2338   2338 		    		
0bc6  cd d5 06      2339   2339 EO_i1test:	call	I2C1_STOP
                    2340   2340 		
Z80-Assembler		Release 1.4				Page 40
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2341   2341 		;transmit error code to host
0bc9  3a 15 10      2342   2342 		ld	a,(temp0)
0bcc  cd dc 08      2343   2343 		call	APP_ACCU	;append value to STD_OUT
0bcf  cd 10 08      2344   2344 		call	TX_STD_OUT	;TX input value to host
                    2345   2345 
0bd2  c9            2346   2346 		ret
                    2347   2347 
                    2348   2348 ;---------PIO test---------------------------
                    2349   2349 p_test:
0bd3  21 7a 0e      2350   2350 		ld 	HL,pio_ab
0bd6  cd 17 08      2351   2351 		call	TX_STR
0bd9  21 85 0e      2352   2352 	    	ld	HL,NEW_LINE	;transmit new line
0bdc  cd 17 08      2353   2353 		call	TX_STR
                    2354   2354 
0bdf  3e 0f         2355   2355 		ld	a,0fh		;port A and B in output mode
0be1  d3 0a         2356   2356 		out	(PIO_A_C),A
                    2357   2357 ;		ld	a,0fh
0be3  d3 0b         2358   2358 		out	(PIO_B_C),A
                    2359   2359 
                    2360   2360 
0be5  06 a0         2361   2361 		ld	B,0A0h		;set duration of test
0be7  21 00 00      2362   2362 l_pt1:		ld	HL,0000h	;set start value
0bea  11 01 00      2363   2363 		ld	DE,0001h	;set step widht
0bed  7d            2364   2364 l_pt0:		ld	A,L
0bee  d3 08         2365   2365 		out	(PIO_A_D),A	;load lowbyte into port A
0bf0  7c            2366   2366 		ld	A,H
0bf1  f6 0c         2367   2367 		or	0Ch		;set B2 and B3 high
0bf3  d3 09         2368   2368 		out	(PIO_B_D),A	;load highbyte into port B
0bf5  19            2369   2369 		ADD	HL,DE		;advance test data counter by one
0bf6  d2 ed 0b      2370   2370 		jp	nc,l_pt0
0bf9  10 ec         2371   2371 		djnz	l_pt1
                    2372   2372 		;FFh is left in output data register of port A and B
                    2373   2373 
0bfb  3e 4f         2374   2374 		ld	a,4fh		;port A and B in input mode
0bfd  d3 0a         2375   2375 		out	(PIO_A_C),A
0bff  d3 0b         2376   2376 		out	(PIO_B_C),A
0c01  c9            2377   2377 		ret
                    2378   2378 
                    2379   2379 
                    2380   2380 reg_dump:
                    2381   2381 ;		call	show_reg
                    2382   2382 ;		ex	AF,AF'
                    2383   2383 ;		exx
                    2384   2384 ;		call	show_reg
                    2385   2385 ;		ex	AF,AF'
                    2386   2386 ;		exx
                    2387   2387 ;		ret
                    2388   2388 
                    2389   2389 ;show_reg:
                    2390   2390 
                    2391   2391 		;backup registers in bak_xx
0c02  e5            2392   2392 		push	HL
0c03  22 06 11      2393   2393 		ld	(bak_hl),HL
                    2394   2394 
0c06  f5            2395   2395 		push	AF
0c07  e1            2396   2396 		pop	HL
0c08  22 00 11      2397   2397 		ld	(bak_af),HL
                    2398   2398 
                    2399   2399 ;		push	BC
                    2400   2400 ;		pop	HL
Z80-Assembler		Release 1.4				Page 41
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0c0b  ed 43 02 11   2401   2401 		ld	(bak_bc),BC
                    2402   2402 
                    2403   2403 ;		push	DE
                    2404   2404 ;		pop	HL
0c0f  ed 53 04 11   2405   2405 		ld	(bak_de),DE
                    2406   2406 
                    2407   2407 ;		push	IX
                    2408   2408 ;		pop	HL
0c13  dd 22 08 11   2409   2409 		ld	(bak_ix),IX
                    2410   2410 
                    2411   2411 ;		push	IY
                    2412   2412 ;		pop	HL
0c17  fd 22 0a 11   2413   2413 		ld	(bak_iy),IY
                    2414   2414 
0c1b  fd e5         2415   2415 		push	IY
0c1d  dd e5         2416   2416 		push	IX
0c1f  d5            2417   2417 		push	DE
0c20  c5            2418   2418 		push	BC
0c21  f5            2419   2419 		push	AF
                    2420   2420 
0c22  cd e5 0c      2421   2421 		call	l_rd3		;make newline
                    2422   2422 
0c25  21 08 0d      2423   2423 		ld	HL,reg_af	;announce transmission of AF
0c28  cd 17 08      2424   2424 		call	TX_STR
0c2b  f1            2425   2425 		pop	AF		;restore value input from port from stack
0c2c  f5            2426   2426 		push	AF
0c2d  cd dc 08      2427   2427 		call	APP_ACCU	;append value to STD_OUT
0c30  c1            2428   2428 		pop	BC
0c31  cd de 0c      2429   2429 		call	l_rd1
                    2430   2430 
0c34  21 0d 0d      2431   2431 		ld	HL,reg_bc	;announce transmission of BC
0c37  cd 17 08      2432   2432 		call	TX_STR
0c3a  f1            2433   2433 		pop	AF		;restore value input from port from stack
0c3b  f5            2434   2434 		push	AF
0c3c  cd dc 08      2435   2435 		call	APP_ACCU	;append value to STD_OUT
0c3f  c1            2436   2436 		pop	BC
0c40  cd de 0c      2437   2437 		call	l_rd1
                    2438   2438 
0c43  21 12 0d      2439   2439 		ld	HL,reg_de	;announce transmission of DE
0c46  cd 17 08      2440   2440 		call	TX_STR
0c49  f1            2441   2441 		pop	AF		;restore value input from port from stack
0c4a  f5            2442   2442 		push	AF
0c4b  cd dc 08      2443   2443 		call	APP_ACCU	;append value to STD_OUT
0c4e  c1            2444   2444 		pop	BC
0c4f  cd de 0c      2445   2445 		call	l_rd1
                    2446   2446 
0c52  21 1c 0d      2447   2447 		ld	HL,reg_ix	;announce transmission of IX
0c55  cd 17 08      2448   2448 		call	TX_STR
0c58  f1            2449   2449 		pop	AF		;restore value input from port from stack
0c59  f5            2450   2450 		push	AF
0c5a  cd dc 08      2451   2451 		call	APP_ACCU	;append value to STD_OUT
0c5d  c1            2452   2452 		pop	BC
0c5e  cd de 0c      2453   2453 		call	l_rd1
                    2454   2454 
0c61  21 21 0d      2455   2455 		ld	HL,reg_iy	;announce transmission of IY
0c64  cd 17 08      2456   2456 		call	TX_STR
0c67  f1            2457   2457 		pop	AF		;restore value input from port from stack
0c68  f5            2458   2458 		push	AF
0c69  cd dc 08      2459   2459 		call	APP_ACCU	;append value to STD_OUT
0c6c  c1            2460   2460 		pop	BC
Z80-Assembler		Release 1.4				Page 42
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0c6d  cd de 0c      2461   2461 		call	l_rd1
                    2462   2462 
0c70  21 17 0d      2463   2463 		ld	HL,reg_hl	;announce transmission of HL
0c73  cd 17 08      2464   2464 		call	TX_STR
0c76  f1            2465   2465 		pop	AF		;restore value input from port from stack
0c77  f5            2466   2466 		push	AF
0c78  cd dc 08      2467   2467 		call	APP_ACCU	;append value to STD_OUT
0c7b  c1            2468   2468 		pop	BC
0c7c  cd de 0c      2469   2469 		call	l_rd1
                    2470   2470 
                    2471   2471 		;get return address
                    2472   2472 ;		pop	DE
0c7f  e1            2473   2473 		pop	HL
0c80  22 0c 11      2474   2474 		ld	(bak_pc),HL
0c83  e5            2475   2475 		push	HL
                    2476   2476 ;		push	DE
                    2477   2477 
0c84  21 26 0d      2478   2478 		ld	HL,reg_pc	;announce transmission of PC
0c87  cd 17 08      2479   2479 		call	TX_STR
0c8a  2a 0c 11      2480   2480 		ld	HL,(bak_pc)
0c8d  7c            2481   2481 		ld	A,H
0c8e  cd dc 08      2482   2482 		call	APP_ACCU	;append value to STD_OUT
0c91  2a 0c 11      2483   2483 		ld	HL,(bak_pc)
0c94  7d            2484   2484 		ld	A,L
0c95  cd df 0c      2485   2485 		call	l_rd2
                    2486   2486 
0c98  21 2b 0d      2487   2487 		ld	HL,reg_sp	;announce transmission of SP
0c9b  cd 17 08      2488   2488 		call	TX_STR
0c9e  ed 73 0e 11   2489   2489 		ld	(bak_sp),SP
0ca2  2a 0e 11      2490   2490 		ld	HL,(bak_sp)
                    2491   2491 ;		inc	HL
                    2492   2492 ;		inc	HL
0ca5  23            2493   2493 		inc	HL
0ca6  23            2494   2494 		inc	HL
0ca7  22 0e 11      2495   2495 		ld	(bak_sp),HL	;correct bak_sp to value previous to register_dump call
0caa  7c            2496   2496 		ld	A,H
0cab  cd dc 08      2497   2497 		call	APP_ACCU	;append value to STD_OUT
0cae  2a 0e 11      2498   2498 		ld	HL,(bak_sp)
0cb1  7d            2499   2499 		ld	A,L
0cb2  cd df 0c      2500   2500 		call	l_rd2
                    2501   2501 
0cb5  21 30 0d      2502   2502 		ld	HL,reg_ir	;announce transmission of IR
0cb8  cd 17 08      2503   2503 		call	TX_STR
0cbb  ed 57         2504   2504 		ld	A,I
0cbd  cd dc 08      2505   2505 		call	APP_ACCU	;append value to STD_OUT
0cc0  ed 5f         2506   2506 		ld	A,R
0cc2  cd df 0c      2507   2507 		call	l_rd2
                    2508   2508 
                    2509   2509 
                    2510   2510 		;restore registers
0cc5  ed 4b 02 11   2511   2511 		ld	BC,(bak_bc)
0cc9  ed 5b 04 11   2512   2512 		ld	DE,(bak_de)
0ccd  fd 2a 08 11   2513   2513 		ld	IY,(bak_ix)
0cd1  dd 2a 0a 11   2514   2514 		ld	IX,(bak_iy)
0cd5  2a 00 11      2515   2515 		ld	HL,(bak_af)
0cd8  e5            2516   2516 		push	HL
0cd9  f1            2517   2517 		pop	AF
0cda  2a 06 11      2518   2518 		ld	HL,(bak_hl)
                    2519   2519 	
                    2520   2520 
Z80-Assembler		Release 1.4				Page 43
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2521   2521 
0cdd  c9            2522   2522 		ret
                    2523   2523 
                    2524   2524 l_rd1:
0cde  79            2525   2525 		ld	a,c
0cdf  cd dc 08      2526   2526 l_rd2:		call	APP_ACCU	;append value to STD_OUT
0ce2  cd 10 08      2527   2527 		call	TX_STD_OUT	;TX input value to host
0ce5  21 85 0e      2528   2528 l_rd3:		ld	HL,NEW_LINE	;transmit new line
0ce8  cd 17 08      2529   2529 		call	TX_STR
0ceb  c9            2530   2530 		ret
                    2531   2531 
                    2532   2532 
                    2533   2533 ;-------TEXT BEGIN---------------------------------------------------
                    2534   2534 Welcome:
0cec  0c            2535   2535 	DEFB	0Ch	;CLS
0ced  54 52 41 49   2536   2536 	DEFM	'TRAIN-Z V9.3 ready' ;sys version
0cf1  4e 2d 5a 20   2536   2537
0cf5  56 39 2e 33   2536   2538
0cf9  20 72 65 61   2536   2539
0cfd  64 79         2536   2540
0cff  00            2537   2541 	DEFB	0
                    2538   2542 	
0d00  0a            2539   2543 prompt:	DEFB	0Ah	;next line
0d01  0d            2540   2544 	DEFB	0Dh	;cursor home
0d02  63 6d 64 3e   2541   2545 	DEFM	'cmd> '
0d06  20            2541   2546
0d07  00            2542   2547 	DEFB	0
                    2543   2548 
                    2544   2549 reg_af:
0d08  41 46 3a 20   2545   2550 	DEFM	'AF: '
0d0c  00            2546   2551 	DEFB	0
                    2547   2552 
                    2548   2553 reg_bc:
0d0d  42 43 3a 20   2549   2554 	DEFM	'BC: '
0d11  00            2550   2555 	DEFB	0
                    2551   2556 
                    2552   2557 reg_de:
0d12  44 45 3a 20   2553   2558 	DEFM	'DE: '
0d16  00            2554   2559 	DEFB	0
                    2555   2560 
                    2556   2561 reg_hl:
0d17  48 4c 3a 20   2557   2562 	DEFM	'HL: '
0d1b  00            2558   2563 	DEFB	0
                    2559   2564 
                    2560   2565 reg_ix:
0d1c  49 58 3a 20   2561   2566 	DEFM	'IX: '
0d20  00            2562   2567 	DEFB	0
                    2563   2568 
                    2564   2569 reg_iy:
0d21  49 59 3a 20   2565   2570 	DEFM	'IY: '
0d25  00            2566   2571 	DEFB	0
                    2567   2572 
                    2568   2573 reg_pc:
0d26  50 43 3a 20   2569   2574 	DEFM	'PC: '
0d2a  00            2570   2575 	DEFB	0
                    2571   2576 
                    2572   2577 reg_sp:
0d2b  53 50 3a 20   2573   2578 	DEFM	'SP: '
0d2f  00            2574   2579 	DEFB	0
                    2575   2580 
Z80-Assembler		Release 1.4				Page 44
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2576   2581 reg_ir:
0d30  49 52 3a 20   2577   2582 	DEFM	'IR: '
0d34  00            2578   2583 	DEFB	0
                    2579   2584 
                    2580   2585 error:
0d35  2e 2e 2e 3f   2581   2586 	DEFM	'...?'
0d39  00            2582   2587 	DEFB	0
                    2583   2588 
                    2584   2589 mem_adr16:
0d3a  6d 65 6d 5f   2585   2590 	DEFM	'mem_adr: '
0d3e  61 64 72 3a   2585   2591
0d42  20            2585   2592
0d43  00            2586   2593 	DEFB	0	
                    2587   2594 
                    2588   2595 source16:
0d44  73 6f 75 72   2589   2596 	DEFM	'source_adr: '
0d48  63 65 5f 61   2589   2597
0d4c  64 72 3a 20   2589   2598
0d50  00            2590   2599 	DEFB	0	
                    2591   2600 
                    2592   2601 destin16:
0d51  64 65 73 74   2593   2602 	DEFM	'destination_adr: '
0d55  69 6e 61 74   2593   2603
0d59  69 6f 6e 5f   2593   2604
0d5d  61 64 72 3a   2593   2605
0d61  20            2593   2606
0d62  00            2594   2607 	DEFB	0	
                    2595   2608 	
                    2596   2609 count16:
0d63  6e 75 6d 62   2597   2610 	DEFM	'number_of_bytes: '
0d67  65 72 5f 6f   2597   2611
0d6b  66 5f 62 79   2597   2612
0d6f  74 65 73 3a   2597   2613
0d73  20            2597   2614
0d74  00            2598   2615 	DEFB	0	
                    2599   2616 
                    2600   2617 new_dat:
0d75  6e 65 77 5f   2601   2618 	DEFM	'new_dat: '
0d79  64 61 74 3a   2601   2619
0d7d  20            2601   2620
0d7e  00            2602   2621 	DEFB	0h
                    2603   2622 
                    2604   2623 AWT_TRM:
0d7f  70 6c 65 61   2605   2624 	DEFM	'please send file via xmodem !'
0d83  73 65 20 73   2605   2625
0d87  65 6e 64 20   2605   2626
0d8b  66 69 6c 65   2605   2627
0d8f  20 76 69 61   2605   2628
0d93  20 78 6d 6f   2605   2629
0d97  64 65 6d 20   2605   2630
0d9b  21            2605   2631
0d9c  00            2606   2632 	DEFB	0h
                    2607   2633 
                    2608   2634 io_adr:
0d9d  69 6f 5f 61   2609   2635 	DEFM	'io_addr: '
0da1  64 64 72 3a   2609   2636
0da5  20            2609   2637
0da6  00            2610   2638 	DEFB	0h
                    2611   2639 
                    2612   2640 io_dat:
Z80-Assembler		Release 1.4				Page 45
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0da7  69 6f 5f 64   2613   2641 	DEFM	'io_data: '
0dab  61 74 61 3a   2613   2642
0daf  20            2613   2643
0db0  00            2614   2644 	DEFB	0h
                    2615   2645 
                    2616   2646 
                    2617   2647 ;I2C PIOs:
                    2618   2648 p0_sel:
0db1  70 30 5f 73   2619   2649 	DEFM	'p0_sel: '
0db5  65 6c 3a 20   2619   2650
0db9  00            2620   2651 	DEFB	0h
                    2621   2652 
                    2622   2653 p1_sel:
0dba  70 31 5f 73   2623   2654 	DEFM	'p1_sel: '
0dbe  65 6c 3a 20   2623   2655
0dc2  00            2624   2656 	DEFB	0h
                    2625   2657 
                    2626   2658 p0_out:
0dc3  70 30 5f 6f   2627   2659 	DEFM	'p0_out: '
0dc7  75 74 3a 20   2627   2660
0dcb  00            2628   2661 	DEFB	0h
                    2629   2662 
                    2630   2663 p1_out:
0dcc  70 31 5f 6f   2631   2664 	DEFM	'p1_out: '
0dd0  75 74 3a 20   2631   2665
0dd4  00            2632   2666 	DEFB	0h
                    2633   2667 
                    2634   2668 p0_in:
0dd5  70 30 5f 69   2635   2669 	DEFM	'p0_in:  '
0dd9  6e 3a 20 20   2635   2670
0ddd  00            2636   2671 	DEFB	0h
                    2637   2672 
                    2638   2673 p1_in:
0dde  70 31 5f 69   2639   2674 	DEFM	'p1_in:  '
0de2  6e 3a 20 20   2639   2675
0de6  00            2640   2676 	DEFB	0h
                    2641   2677 
                    2642   2678 ;I2C FLASHs
                    2643   2679 f0_sel:
0de7  66 30 5f 73   2644   2680 	DEFM	'f0_sel: '
0deb  65 6c 3a 20   2644   2681
0def  00            2645   2682 	DEFB	0h
                    2646   2683 
                    2647   2684 f1_sel:
0df0  66 31 5f 73   2648   2685 	DEFM	'f1_sel: '
0df4  65 6c 3a 20   2648   2686
0df8  00            2649   2687 	DEFB	0h
                    2650   2688 
                    2651   2689 f0_adr:
0df9  66 30 5f 61   2652   2690 	DEFM	'f0_adr: '
0dfd  64 72 3a 20   2652   2691
0e01  00            2653   2692 	DEFB	0h
                    2654   2693 
                    2655   2694 f1_adr:
0e02  66 31 5f 61   2656   2695 	DEFM	'f1_adr: '
0e06  64 72 3a 20   2656   2696
0e0a  00            2657   2697 	DEFB	0h
                    2658   2698 
                    2659   2699 f0_daw:
0e0b  66 30 5f 64   2660   2700 	DEFM	'f0_daw: '
Z80-Assembler		Release 1.4				Page 46
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0e0f  61 77 3a 20   2660   2701
0e13  00            2661   2702 	DEFB	0h
                    2662   2703 
                    2663   2704 f1_daw:
0e14  66 31 5f 64   2664   2705 	DEFM	'f1_daw: '
0e18  61 77 3a 20   2664   2706
0e1c  00            2665   2707 	DEFB	0h
                    2666   2708 
                    2667   2709 f0_dar:
0e1d  66 30 5f 64   2668   2710 	DEFM	'f0_dar: '
0e21  61 72 3a 20   2668   2711
0e25  00            2669   2712 	DEFB	0h
                    2670   2713 
                    2671   2714 f1_dar:
0e26  66 31 5f 64   2672   2715 	DEFM	'f1_dar: '
0e2a  61 72 3a 20   2672   2716
0e2e  00            2673   2717 	DEFB	0h
                    2674   2718 
0e2f  66 6c 61 73   2675   2719 fl_id:	DEFM	'flash-id: '
0e33  68 2d 69 64   2675   2720
0e37  3a 20         2675   2721
0e39  00            2676   2722 	DEFB	0h
                    2677   2723 
0e3a  70 61 67 65   2678   2724 page:	DEFM	'page: '
0e3e  3a 20         2678   2725
0e40  00            2679   2726 	DEFB	0h
                    2680   2727 
0e41  20 61 74 3a   2681   2728 at:	DEFM	' at: '
0e45  20            2681   2729
0e46  00            2682   2730 	DEFB	0h
                    2683   2731 
0e47  20 65 78 70   2684   2732 expect:	DEFM	' expected: '
0e4b  65 63 74 65   2684   2733
0e4f  64 3a 20      2684   2734
0e52  00            2685   2735 	DEFB	0h
                    2686   2736 
0e53  20 72 65 61   2687   2737 read:	DEFM	' read: '
0e57  64 3a 20      2687   2738
0e5a  00            2688   2739 	DEFB	0h
                    2689   2740 
                    2690   2741 i2cflash:
0e5b  49 32 43 20   2691   2742 	DEFM	'I2C SEEPROM...'
0e5f  53 45 45 50   2691   2743
0e63  52 4f 4d 2e   2691   2744
0e67  2e 2e         2691   2745
0e69  00            2692   2746 	DEFB	0h
                    2693   2747 
                    2694   2748 i2cpio:
0e6a  49 32 43 20   2695   2749 	DEFM	'I2C Expander...'
0e6e  45 78 70 61   2695   2750
0e72  6e 64 65 72   2695   2751
0e76  2e 2e 2e      2695   2752
0e79  00            2696   2753 	DEFB	0h
                    2697   2754 
                    2698   2755 pio_ab:
0e7a  50 49 4f 20   2699   2756 	DEFM	'PIO A/B...'
0e7e  41 2f 42 2e   2699   2757
0e82  2e 2e         2699   2758
0e84  00            2700   2759 	DEFB	0h
                    2701   2760 
Z80-Assembler		Release 1.4				Page 47
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2702   2761 
                    2703   2762 NEW_LINE:
0e85  0d            2704   2763 	DEFB	0Dh	;next line
0e86  0a            2705   2764 	DEFB	0Ah	;cursor home
0e87  00            2706   2765 	DEFB	0
                    2707   2766 
                    2708   2767 ;STR_TERM:
                    2709   2768 	;DEFB	0Ah	;next line
                    2710   2769 	;DEFB	0Dh	;cursor home
                    2711   2770 ;	DEFB	20h
                    2712   2771 ;	DEFB	20h
                    2713   2772 ;	DEFB	08h
                    2714   2773 ;	DEFB	08h
                    2715   2774 ;	DEFB	0
                    2716   2775 			
                    2717   2776 BS_SP_BS:
0e88  08            2718   2777  	DEFB  	08h		;BSP
0e89  20            2719   2778 	DEFB	20h		;SPACE
0e8a  08            2720   2779 	DEFB	08h		;BSP
0e8b  00            2721   2780 	DEFB	0
                    2722   2781 
                    2723   2782 2xBS:
0e8c  08            2724   2783  	DEFB  	08h		;BSP
0e8d  08            2725   2784 	DEFB	08h		;BSP
0e8e  00            2726   2785 	DEFB	0
                    2727   2786 
                    2728   2787 	
                    2729   2788 ;-------COMMAND SET begin----------------------------------------		
                    2730   2789 
                    2731   2790 HELP:	
0e8f  68 65 6c 70   2732   2791 	DEFM	'help'
0e93  0d            2733   2792 	DEFB	0Dh
                    2734   2793 
                    2735   2794 CMD_SET:
                    2736   2795 
                    2737   2796 POUT:
0e94  70 6f 72 74   2738   2797 	DEFM	'portout'
0e98  6f 75 74      2738   2798
0e9b  0d            2739   2799 	DEFB	0Dh	;cursor home
0e9c  0a            2740   2800 	DEFB	0Ah	;next line
                    2741   2801 
                    2742   2802 PIN:
0e9d  70 6f 72 74   2743   2803 	DEFM	'portin'
0ea1  69 6e         2743   2804
0ea3  0d            2744   2805 	DEFB	0Dh	;cursor home
0ea4  0a            2745   2806 	DEFB	0Ah	;next line
                    2746   2807 
                    2747   2808 RSTI2C0:
0ea5  72 73 74 69   2748   2809 	DEFM	'rsti0'
0ea9  30            2748   2810
0eaa  0d            2749   2811 	DEFB	0Dh	;cursor home
0eab  0a            2750   2812 	DEFB	0Ah	;next line
                    2751   2813 
                    2752   2814 RSTI2C1:
0eac  72 73 74 69   2753   2815 	DEFM	'rsti1'
0eb0  31            2753   2816
0eb1  0d            2754   2817 	DEFB	0Dh	;cursor home
0eb2  0a            2755   2818 	DEFB	0Ah	;next line
                    2756   2819 
                    2757   2820 I2C0F:
Z80-Assembler		Release 1.4				Page 48
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0eb3  69 30 66      2758   2821 	DEFM	'i0f'
0eb6  0d            2759   2822 	DEFB	0Dh	;cursor home
0eb7  0a            2760   2823 	DEFB	0Ah	;next line
                    2761   2824 
                    2762   2825 I2C0P:
0eb8  69 30 70      2763   2826 	DEFM	'i0p'
0ebb  0d            2764   2827 	DEFB	0Dh	;cursor home
0ebc  0a            2765   2828 	DEFB	0Ah	;next line
                    2766   2829 
                    2767   2830 I2C1F:
0ebd  69 31 66      2768   2831 	DEFM	'i1f'	
0ec0  0d            2769   2832 	DEFB	0Dh	;cursor home
0ec1  0a            2770   2833 	DEFB	0Ah	;next line
                    2771   2834 
                    2772   2835 I2C1P:
0ec2  69 31 70      2773   2836 	DEFM	'i1p'
0ec5  0d            2774   2837 	DEFB	0Dh	;cursor home
0ec6  0a            2775   2838 	DEFB	0Ah	;next line
                    2776   2839 
                    2777   2840 VIEW_MEM:
0ec7  76 69 65 77   2778   2841 	DEFM	'viewmem'
0ecb  6d 65 6d      2778   2842
0ece  0d            2779   2843 	DEFB	0Dh	;cursor home
0ecf  0a            2780   2844 	DEFB	0Ah	;next line
                    2781   2845 	
                    2782   2846 cmp:	
0ed0  63 6f 6d 70   2783   2847 	DEFM	'comp'
0ed4  0d            2784   2848 	DEFB	0Dh	;cursor home
0ed5  0a            2785   2849 	DEFB	0Ah	;next line
                    2786   2850 
                    2787   2851 copy:
0ed6  63 6f 70 79   2788   2852 	DEFM	'copy'
0eda  0d            2789   2853 	DEFB	0Dh	;cursor home
0edb  0a            2790   2854 	DEFB	0Ah	;next line
                    2791   2855 
                    2792   2856 fill:
0edc  66 69 6c 6c   2793   2857 	DEFM	'fill'
0ee0  0d            2794   2858 	DEFB	0Dh	;cursor home
0ee1  0a            2795   2859 	DEFB	0Ah	;next line
                    2796   2860 
                    2797   2861 PRG_FL:
0ee2  70 72 67 66   2798   2862 	DEFM	'prgflash'
0ee6  6c 61 73 68   2798   2863
0eea  0d            2799   2864 	DEFB	0Dh	;cursor home
0eeb  0a            2800   2865 	DEFB	0Ah	;next line
                    2801   2866 
                    2802   2867 erf:
0eec  65 72 61 73   2803   2868 	DEFM	'eraseflash'
0ef0  65 66 6c 61   2803   2869
0ef4  73 68         2803   2870
0ef6  0d            2804   2871 	DEFB	0Dh	;cursor home
0ef7  0a            2805   2872 	DEFB	0Ah	;next line
                    2806   2873 
                    2807   2874 RAM_S:
0ef8  74 65 73 74   2808   2875 	DEFM	'testmem'
0efc  6d 65 6d      2808   2876
0eff  0d            2809   2877 	DEFB	0Dh	;cursor home
0f00  0a            2810   2878 	DEFB	0Ah	;next line
                    2811   2879 
                    2812   2880 DLD:	
Z80-Assembler		Release 1.4				Page 49
Source file: train-z93_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0f01  6c 6f 61 64   2813   2881 	DEFM	'load'
0f05  0d            2814   2882 	DEFB	0Dh	;cursor home
0f06  0a            2815   2883 	DEFB	0Ah	;next line
                    2816   2884 
                    2817   2885 ca_usr_prg:
0f07  63 61 6c 6c   2818   2886 	DEFM	'call'
0f0b  0d            2819   2887 	DEFB	0Dh	;cursor home
0f0c  0a            2820   2888 	DEFB	0Ah	;next line
                    2821   2889 
                    2822   2890 EO:	
0f0d  65 63 68 6f   2823   2891 	DEFM	'echooff'
0f11  6f 66 66      2823   2892
0f14  0d            2824   2893 	DEFB	0Dh	;cursor home
0f15  0a            2825   2894 	DEFB	0Ah	;next line
                    2826   2895 
                    2827   2896 i2c1_test:
0f16  74 65 73 74   2828   2897 	DEFM	'testi1'
0f1a  69 31         2828   2898
0f1c  0d            2829   2899 	DEFB	0Dh	;cursor home
0f1d  0a            2830   2900 	DEFB	0Ah	;next line
                    2831   2901 
                    2832   2902 pio_test:
0f1e  74 65 73 74   2833   2903 	DEFM	'testpio'
0f22  70 69 6f      2833   2904
0f25  0d            2834   2905 	DEFB	0Dh	;cursor home
0f26  0a            2835   2906 	DEFB	0Ah	;next line
                    2836   2907 
                    2837   2908 
                    2838   2909 CMDs_END:
0f27  00            2839   2910 	DEFB	0h
                    2840   2911 
                    2841   2912 
                    2842   2913 
