Z80-Assembler		Release 1.4				Page 1
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                       1      1 ;    This program is free software: you can redistribute it and/or modify
                       2      2 ;    it under the terms of the GNU General Public License as published by
                       3      3 ;    the Free Software Foundation, either version 3 of the License, or
                       4      4 ;    (at your option) any later version.
                       5      5 ;
                       6      6 ;    This program is distributed in the hope that it will be useful,
                       7      7 ;    but WITHOUT ANY WARRANTY; without even the implied warranty of
                       8      8 ;    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                       9      9 ;    GNU General Public License for more details.
                      10     10 ;
                      11     11 ;    You should have received a copy of the GNU General Public License
                      12     12 ;    along with this program.  If not, see <http://www.gnu.org/licenses/>.
                      13     13 
                      14     14 ;	 Copyright 2011 Mario Blunk - electronics & IT engineering at www.train-z.de
                      15     15 
                      16     16 ;   Version 9.4 supports AM29F040 FLASH EEPROM made by AMD
                      17     17 
                      18     18 
                      19     19 ;OFFSET	equ	1800h
                      20     20 ;OFFSET	equ	8000h
0000                  21     21 OFFSET	equ	0000h
                      22     22 
                      23     23 
0000                  24     24 CH0	equ	0h
0001                  25     25 CH1	equ	1h
0002                  26     26 CH2	equ	2h
0003                  27     27 CH3	equ	3h
                      28     28 
0004                  29     29 SIO_A_D	equ	4h
0006                  30     30 SIO_A_C	equ	6h
0005                  31     31 SIO_B_D	equ	5h
0007                  32     32 SIO_B_C	equ	7h
                      33     33 
0008                  34     34 PIO_A_D	equ	8h
000a                  35     35 PIO_A_C	equ	0Ah
0009                  36     36 PIO_B_D	equ	9h
000b                  37     37 PIO_B_C	equ	0Bh
                      38     38 
1800                  39     39 RAM_BOT		equ	1800h+OFFSET	;lowest user RAM address
                      40     40 
1000                  41     41 RAM_DATA_STS	equ	1000h	;holds 1 after successful download in RAM area
                      42     42 				;beginning at 1800h+OFFSET
                      43     43 
                      44     44 ;RAM_HID		equ	1000h		;lowest system RAM address
1001                  45     45 SCRATCH		equ	1001h 	;used by various functions
1002                  46     46 CMD_STS		equ	1002h	;holds status of cmd. 0=incomplete, 1=complete
1003                  47     47 PIO_A_MODE	equ	1003h	;holds current PIO A mode
1004                  48     48 PIO_A_IO_CONF	equ	1004h	;holds current IO configuration of PIO A
                      49     49 
1005                  50     50 PIO_B_MODE	equ	1005h	;holds current PIO B mode
1006                  51     51 PIO_B_IO_CONF	equ	1006h	;holds current IO configuration of PIO B
                      52     52 
1007                  53     53 RAM_TOP		equ	1007h	;here and at RAM_TOP+1 highest user RAM address stored
                      54     54 			;1008h	;highbyte of highest user RAM address
                      55     55 ;BLK_ERR		equ	1009h	;number of garbled blocks during download
100b                  56     56 OUT_LEN		equ	100Bh	;holds length of output buffer (lowbyte)
                      57     57 			;100Ch 	;holds length of output buffer (highbyte)
100d                  58     58 ECHO_STS	equ	100Dh	;holds FFh if echo enabled, 0h if echo disabled
                      59     59 
100e                  60     60 TEMP3		equ	100Eh	;used by heartbeat
Z80-Assembler		Release 1.4				Page 2
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                      61     61 
100f                  62     62 SOURCE_ADR	equ	100Fh	;for flash programming: source address lowbyte
                      63     63 			;1010h	;source address highbyte
1011                  64     64 DEST_ADR	equ	1011h	;for flash programming: destination address lowbyte
                      65     65 			;1012h	;destination address highbyte
1013                  66     66 NUMB_OF_BYTES	equ	1013h	;for flash programming: number of bytes lowbyte
                      67     67 			;1014h	;number of byte highbyte
1015                  68     68 temp0		equ	1015h	;used by various functions, holds number of 
                      69     69 				;unsuccessful block transfers/block during download
                      70     70 			;1016h	;highbyte of temp0
101c                  71     71 CMD_LEN 	equ	101Ch	;holds actual length of cmd in cmd buffer (lowbyte)
                      72     72 			;101Dh	;holds actual length of cmd in cmd buffer (highbyte)
101e                  73     73 IN_LEN		equ	101Eh	;holds length of of last cmd in input buffer (lowbyte)
                      74     74 			;101F	;holds length of of last cmd in input buffer (highbyte)
                      75     75 			
1020                  76     76 CMD_PTR		equ	01020h	;start pos where cmd buffer begins, RX char become appended
                      77     77 				;req_number converts cmd buffer to integer NUMBER (see below)
                      78     78 				;max 32d characters allowed
                      79     79 				;so value in NUMBER may be as large as 16x8bit=128bit
1040                  80     80 STD_OUT		equ	01040h	;start pos where TX chars are stored and appended, max 64d char 
                      81     81 				;allowed
1080                  82     82 NUMBER		equ	01080h	;start pos of long number storage
                      83     83 				;no protection agains stack corruption !
                      84     84 				;stack defaults to 1800h upon system start
                      85     85 
                      86     86 ;fuer zwischenspeicherung in funktion register dump:	;v93
1100                  87     87 bak_af		equ	01100h
1102                  88     88 bak_bc		equ	01102h
1104                  89     89 bak_de		equ	01104h
1106                  90     90 bak_hl		equ	01106h
1108                  91     91 bak_ix		equ	01108h
110a                  92     92 bak_iy		equ	0110Ah
110c                  93     93 bak_pc		equ	0110Ch
110e                  94     94 bak_sp		equ	0110Eh
                      95     95 ;-------------------------------------------------------------------------------
                      96     96 
                      97     97 
                      98     98 
                      99     99 
                     100    100 
                     101    101 
                     102    102 
                     103    103 
                     104    104 ;-------PROG START UPON SYSTEM RESET BEGIN: ------------------------------------
                     105    105 	org	0+OFFSET
                     106    106 WARM_START:
0000  c3 00 01       107    107 	jp	INI_PIO
                     108    108 	
                     109    109 	;int vectors for cmd line mode
                     110    110 	org	0Ch+OFFSET
000c  f3 06          111    111 	DEFW	RX_CHA_AVAILABLE
                     112    112 	org	0Eh+OFFSET
000e  7a 07          113    113 	DEFW	SPEC_RX_CONDITON
                     114    114 
                     115    115 	;int vectors for CTC
                     116    116 	org	16h+OFFSET
0016  dd 06          117    117 	DEFW	CT3_ZERO
                     118    118 
                     119    119 	;int vectors for download mode:
                     120    120 	org	1Ch+OFFSET
Z80-Assembler		Release 1.4				Page 3
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
001c  29 05          121    121 	DEFW	BYTE_AVAILABLE
                     122    122 	org	1Eh+OFFSET
001e  76 05          123    123 	DEFW	SPEC_BYTE_COND
                     124    124 
                     125    125 	org	66h+OFFSET
                     126    126 ;	DEFW	NMI
0066  c3 00 00       127    127 NMI:	jp	WARM_START	;handle NMI as Master Reset
                     128    128 
                     129    129 
                     130    130 
                     131    131 ;-------PIO INIT begin-----------------------------
                     132    132 	org	0100h+OFFSET	
                     133    133 	
                     134    134 INI_PIO:
                     135    135 	;init PIO A
0100  3e 4f          136    136 	ld	a,04Fh		; set PIO A input mode
0102  d3 0a          137    137 	out	(PIO_A_C),A
0104  3e ff          138    138 	ld	a,0FFh		; set D7..0 of output register H
0106  d3 08          139    139 	out	(PIO_A_D),A	; 
                     140    140 
                     141    141 	;init PIO B
0108  3e cf          142    142 	ld	A,0CFh		; set PIO B to bit mode
010a  32 05 10       143    143 	ld	(PIO_B_MODE),A	; update global PIO B mode status variable
010d  d3 0b          144    144 	out	(PIO_B_C),A
                     145    145 
010f  3e ff          146    146 	ld	a,0FFh		; set D7..0 to input mode
0111  32 06 10       147    147 	ld	(PIO_B_IO_CONF),A	;update global PIO B IO status variable
0114  d3 0b          148    148 	out	(PIO_B_C),A	; write IO configuration into PIO B
                     149    149 	
0116  3e f0          150    150 	ld	A,0F0h		; SDA0, SCL0, SDA1, SCL1 = L
                     151    151 				; if direction of SDA or SCL changes to output
                     152    152 				; the pin will drive L
0118  d3 09          153    153 	out	(PIO_B_D),A	;loading PIO B output register
                     154    154 	
011a  db 09          155    155 	in	A,(PIO_B_D)	;check status of PIO B D7
011c  cb 7f          156    156 	bit	7,A		;when H proceed at INI_PIO_DONE
011e  c2 2c 01       157    157 	jp	nz,INI_PIO_DONE	;when L
                     158    158 	;re-init PIO B
0121  3e 4f          159    159 	ld	a,04Fh		; set PIO B input mode
0123  d3 0b          160    160 	out	(PIO_B_C),A
0125  3e ff          161    161 	ld	a,0FFh		; set D7..0 of output register H
0127  d3 09          162    162 	out	(PIO_B_D),A	; 
0129  c3 00 80       163    163 	jp	8000h		; jump to user prom bottom address
                     164    164 INI_PIO_DONE:
                     165    165 
                     166    166 
                     167    167 ;ROM_TEST:
                     168    168 ;	ld	E,06Fh	;load E with expected rom check sum
                     169    169 ;	ld	HL,0h
                     170    170 ;	ld	B,0h
                     171    171 ;	sub	A	;A,B,HL cleared
                     172    172 ;l_RT:	ld	A,B	;restore A from B
                     173    173 ;	add	A,(HL)	;add A and data where HL points to
                     174    174 ;	inc	HL	;advance HL
                     175    175 ;	ld	B,A	;backup A in B
                     176    176 ;	ld	A,H	;look if
                     177    177 ;	cp	10h	;H has reached last ROM address +1 
                     178    178 ;	jp	nz,l_RT	;loop until H has reached last ROM address +1
                     179    179 ;	ld	A,B	;restore A from B
                     180    180 ;	cp	E	;compare A with expected rom check sum
Z80-Assembler		Release 1.4				Page 4
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     181    181 ;	jp	z,RT_END;if match proceed at RT_END
                     182    182 	
                     183    183 	;init PIO A
                     184    184 ;	ld	a,0CFh		; set PIO A to bit mode
                     185    185 ;	out	(PIO_A_C),A
                     186    186 ;	ld	a,0FEh		; set D0 to output mode
                     187    187 ;	out	(PIO_A_C),A	;
                     188    188 ;	ld	a,0h		; set D0 L
                     189    189 ;	out	(PIO_A_D),A
                     190    190 ;	ld	B,0
                     191    191 ;l_RT0:	djnz	l_RT0
                     192    192 ;	jp	WARM_START
                     193    193 ;RT_END:
                     194    194 
                     195    195 ;-------------------------------------------------------------
                     196    196 INI_SYS_VAR:
012c  21 00 18       197    197 	ld	HL,1800h	; init stack pointer
012f  f9             198    198 	ld	SP,HL
0130  97             199    199 	sub	A
                     200    200 ;	ld	(BLK_ERR),A
0131  32 1c 10       201    201 	ld	(CMD_LEN),A	; reset CMD length counter
0134  32 1d 10       202    202 	ld	(CMD_LEN+1),A
0137  32 02 10       203    203 	ld	(CMD_STS),A	; clear CMD status variable
013a  32 00 10       204    204 	ld	(RAM_DATA_STS),A ; clear RAM DATA STS
013d  32 0b 10       205    205 	ld	(OUT_LEN),A	; clear STD_OUT length counter	
0140  32 0c 10       206    206 	ld	(OUT_LEN+1),A
0143  3d             207    207 	dec	A
0144  32 0d 10       208    208 	ld	(ECHO_STS),A	; set ECHO ON
                     209    209 
                     210    210 ;----------------------------------------------------------------------
                     211    211 
                     212    212 
                     213    213 	;RESET all I2C-Busses
0147  cd 9c 05       214    214 	call	RST_I2C0
014a  cd a7 05       215    215 	call	RST_I2C1
                     216    216 	
                     217    217 
                     218    218 ;-------CTC INIT begin----------------------------------------------------------------------
                     219    219 INI_CTC:
                     220    220 	;init CH 1
014d  3e 03          221    221 	ld 	A,00000011b	; int off, timer on, prescaler=16, don't care ext. TRG edge,
                     222    222 				; start timer on loading constant, no time constant follows
                     223    223 				; sw-rst active, this is a ctrl cmd
014f  d3 01          224    224 	out 	(CH1),A		; CH1 is on hold now
                     225    225 
                     226    226 
                     227    227 
                     228    228 	;init CH2
                     229    229 	;CH2 divides CPU CLK by (256*256) providing clock signal at TO2 at JP3:#11 
0151  3e 27          230    230 	ld 	A,00100111b	; int off, timer on, prescaler=256, no ext. start,
                     231    231 				; start upon loading time constant, time constant follows
                     232    232 				; sw reset, this is a ctrl cmd
0153  d3 02          233    233 	out 	(CH2),A
                     234    234 ;	ld	A,0FFh		; time constant defined
0155  3e 60          235    235 	ld	A,060h		; time constant defined	;v93
0157  d3 02          236    236 	out 	(CH2),A		; and loaded into channel 2
                     237    237 				; T02 outputs 77Hz (at 5Mhz CPU CLK)
                     238    238 
                     239    239 
                     240    240 	;init CH3
Z80-Assembler		Release 1.4				Page 5
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     241    241 	;CH3 is supplied by clock signal from TO2 via jumper at JP3:#11/13
                     242    242 	;CH3 divides TO2 clock by AFh
                     243    243 	;CH3 interupts CPU appr. every 2sec to service int routine CT3_ZERO (flashed LED D0/1)
0159  3e c7          244    244 	ld 	A,11000111b	; int on, counter on, prescaler don't care, edge don't care,
                     245    245 				; time trigger don't care, time constant follows
                     246    246 				; sw reset, this is a ctrl cmd
015b  d3 03          247    247 	out 	(CH3),A
015d  3e af          248    248 	ld	A,0AFh		; time constant defined
015f  d3 03          249    249 	out 	(CH3),A		; and loaded into channel 3
                     250    250 	
0161  3e 10          251    251 	ld	A,10h		; it vector defined in bit 7-3,bit 2-1 don't care, bit 0 = 0
0163  d3 00          252    252 	out 	(CH0),A		; and loaded into channel 0
                     253    253 
                     254    254 
                     255    255 
                     256    256 	;init CH0
                     257    257 	;CH0 provides SIO A RX/TX clock
0165  3e 07          258    258 	ld 	A,00000111b	; int off, timer on, prescaler=16, don't care ext. TRG edge,
                     259    259 				; start timer on loading constant, time constant follows
                     260    260 				; sw-rst active, this is a ctrl cmd
0167  d3 00          261    261 	out 	(CH0),A
0169  3e 01          262    262 	ld	A,1h		; time constant defined
016b  d3 00          263    263 	out 	(CH0),A		; and loaded into channel 0
                     264    264 
                     265    265 				; TO0 outputs app. 10Mhz/2/16/(time constant)/16
                     266    266 				; which results in 19200 bits per sec
                     267    267 ;-------CTC INIT done-----------------------------------------------------------------------
                     268    268 
                     269    269 
                     270    270 
                     271    271 
                     272    272 
                     273    273 
                     274    274 
                     275    275 
                     276    276 
                     277    277 
                     278    278 
                     279    279 ;-------SIO INIT begin----------------------------------------------------------------------
                     280    280 INI_SIO:
016d  cd 7d 07       281    281 	call	SIO_A_RESET	;cares for WR4,5,1 settings
                     282    282 
                     283    283 ;-------SIO INIT done-----------------------------------------------------------------------
                     284    284 
                     285    285 
                     286    286 
                     287    287 
                     288    288 
                     289    289 
                     290    290 
                     291    291 
                     292    292 
                     293    293 
                     294    294 
                     295    295 
                     296    296 ;-------CPU Interrupt setup begin----------------------------------------------------------
                     297    297 INT_INI:
0170  01 00 00       298    298 	ld	BC,OFFSET
0173  78             299    299 	ld	A,B
0174  ed 47          300    300 	ld	I,A	;load I reg with highbyte of OFFSET
Z80-Assembler		Release 1.4				Page 6
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0176  ed 5e          301    301 	im	2	;enable int mode 2
                     302    302 	;di		;no int allowed yet, will be enabled later
0178  fb             303    303 	ei		;V841
                     304    304 ;-------CPU Interrupt setup end------------------------------------------------------------	
                     305    305 	
                     306    306 
                     307    307 
                     308    308 
                     309    309 
                     310    310 
                     311    311 
                     312    312 
                     313    313 
                     314    314 
                     315    315 
                     316    316 
                     317    317 
                     318    318 
                     319    319 ;-------MENUE begin------------------------------------------------------------------------
                     320    320 menu:
0179  21 a0 0c       321    321 	ld	HL,Welcome	;TX welcome note
017c  cd 0e 08       322    322 	call	TX_STR
                     323    323 	;call	TX_STR_TERM
                     324    324 
017f  21 b4 0c       325    325 	ld	HL,prompt	;TX prompt
0182  cd 0e 08       326    326 	call	TX_STR
                     327    327 ;	call	TX_STR_TERM
                     328    328 
                     329    329 
                     330    330 
                     331    331 
                     332    332 
                     333    333 ;-------CMD pre processor begin-------------------------------------------
                     334    334 CMD_pre_proc:
                     335    335 ;	call	SIO_A_EI	;enable SIO_A interrupts
0185  cd 65 07       336    336 	call	poll_CMD_cpl	;loop here until CMD_STS=complete
                     337    337 	
                     338    338 ;-------CMD pre processor end----------------------------------------------
                     339    339 
                     340    340 
                     341    341 
                     342    342 
                     343    343 
                     344    344 ;-------CMD post processor begin-------------------------------------------
                     345    345 CMD_post_proc:
                     346    346 	;verify cmd in cmd buffer against list of available cmds:
                     347    347 	
                     348    348 
                     349    349 
0188  21 90 0e       350    350 	ld	HL,fill
018b  cd 6d 04       351    351 	call	PAR_CMD
018e  d2 97 01       352    352 	jp	nc,l_16
                     353    353 
                     354    354 
0191  cd 8c 09       355    355 		call	fill_mem
0194  c3 64 04       356    356 		jp	EO_post_proc
                     357    357 
                     358    358 
                     359    359 
                     360    360 l_16:
Z80-Assembler		Release 1.4				Page 7
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0197  21 8a 0e       361    361 	ld	HL,copy	
019a  cd 6d 04       362    362 	call	PAR_CMD
019d  d2 a8 01       363    363 	jp	nc,l_15
                     364    364 
01a0  cd 5c 09       365    365 		call	req_snd		;request source, number, destination address
01a3  ed b0          366    366 		ldir
01a5  c3 64 04       367    367 		jp	EO_post_proc
                     368    368 
                     369    369 
                     370    370 
                     371    371 l_15:
01a8  21 84 0e       372    372 	ld	HL,cmp	
01ab  cd 6d 04       373    373 	call	PAR_CMD
01ae  d2 ba 01       374    374 	jp	nc,l_13
                     375    375 
01b1  cd 5c 09       376    376 		call	req_snd		;request source, number, destination address
01b4  cd ac 09       377    377 		call	cmp_mem		;compare mem blocks
01b7  c3 64 04       378    378 		jp	EO_post_proc
                     379    379 
                     380    380 
                     381    381 l_13:
01ba  21 a0 0e       382    382 	ld	HL,erf	
01bd  cd 6d 04       383    383 	call	PAR_CMD
01c0  d2 cc 01       384    384 	jp	nc,l_14
                     385    385 
01c3  cd 67 0a       386    386 		call	id_check	;do id check of user flash prom
                     387    387 		;call	prot_off	;disable sw protection ;v94
01c6  cd 49 0a       388    388 		call	fl_erase	;erase flash	;v94
                     389    389 		;call	prot_on		;enable sw protection ;v94
01c9  c3 64 04       390    390 		jp	EO_post_proc
                     391    391 
                     392    392 	
                     393    393 
                     394    394 l_14:	
01cc  21 96 0e       395    395 	ld	HL,PRG_FL
01cf  cd 6d 04       396    396 	call	PAR_CMD
01d2  d2 e4 01       397    397 	jp	nc,l_102
                     398    398 	
01d5  cd 5c 09       399    399 		call	req_snd		;request source, number, destination address
01d8  cd 67 0a       400    400 		call	id_check	;do id check of user flash prom
01db  cd 49 0a       401    401 		call	fl_erase	;erase flash
01de  cd f5 09       402    402 		call	fl_prog		;program flash
01e1  c3 64 04       403    403 		jp	EO_post_proc
                     404    404 
                     405    405 
                     406    406 l_102:
01e4  21 48 0e       407    407 	ld	HL,POUT
01e7  cd 6d 04       408    408 	call	PAR_CMD
01ea  d2 07 02       409    409 	jp	nc,l_01
                     410    410 
01ed  21 51 0d       411    411 		ld	HL,io_adr
01f0  cd 0e 08       412    412 		call	TX_STR
                     413    413 ;		call	TX_STR_TERM
01f3  cd d1 07       414    414 		call	req_number	;get io address from host
01f6  4f             415    415 		ld	C,A		;save io address in c
01f7  c5             416    416 		push	BC
01f8  21 5b 0d       417    417 		ld	HL,io_dat
01fb  cd 0e 08       418    418 		call	TX_STR
                     419    419 ;		call	TX_STR_TERM
01fe  cd d1 07       420    420 		call	req_number	;get io data from host
Z80-Assembler		Release 1.4				Page 8
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0201  c1             421    421 		pop	BC		;restore io address in C
0202  ed 79          422    422 		out	(C),A		;output io data at io address
0204  c3 64 04       423    423 		jp	EO_post_proc
                     424    424 
                     425    425 
                     426    426 l_01:
0207  21 51 0e       427    427 	ld	HL,PIN
020a  cd 6d 04       428    428 	call	PAR_CMD
020d  d2 2d 02       429    429 	jp	nc,l_02A
                     430    430 
0210  21 51 0d       431    431 		ld	HL,io_adr
0213  cd 0e 08       432    432 		call	TX_STR
                     433    433 ;		call	TX_STR_TERM
0216  cd d1 07       434    434 		call	req_number	;get io address from host
0219  4f             435    435 		ld	C,A		;save io address in c
021a  ed 78          436    436 		in	A,(C)
021c  f5             437    437 		push	AF		;backup value input from port on stack
021d  21 5b 0d       438    438 		ld	HL,io_dat	;announce transmission of input value
0220  cd 0e 08       439    439 		call	TX_STR
0223  f1             440    440 		pop	AF		;restore value input from port from stack
0224  cd d3 08       441    441 		call	APP_ACCU	;append value to STD_OUT
0227  cd 07 08       442    442 		call	TX_STD_OUT	;TX input value to host
022a  c3 64 04       443    443 		jp	EO_post_proc
                     444    444 
                     445    445 		
                     446    446 l_02A:		
022d  21 d2 0e       447    447 	ld	HL,pio_test
0230  cd 6d 04       448    448 	call	PAR_CMD
0233  d2 3c 02       449    449 	jp	nc,l_02
                     450    450 
0236  cd 87 0b       451    451 		call	p_test
0239  c3 64 04       452    452 		jp	EO_post_proc
                     453    453 
                     454    454 
                     455    455 l_02:
023c  21 ac 0e       456    456 	ld	HL,RAM_S		;see comments at label l_0 and following
023f  cd 6d 04       457    457 	call	PAR_CMD
0242  d2 4b 02       458    458 	jp	nc,l_4
                     459    459 
0245  cd a7 08       460    460 		call	RAM_SIZE_CHK
                     461    461 ;		call	TX_STR_TERM
0248  c3 64 04       462    462 		jp	EO_post_proc
                     463    463 
                     464    464 
                     465    465 
                     466    466 
024b  21 b5 0e       467    467 l_4:	ld	HL,DLD		;see comments at label l_0 and following
024e  cd 6d 04       468    468 	call	PAR_CMD
0251  d2 63 02       469    469 	jp	nc,l_41
                     470    470 
0254  cd 74 09       471    471 		call	req_d	;ask host for destination address
0257  21 33 0d       472    472 		ld	HL,AWT_TRM
025a  cd 0e 08       473    473 		call	TX_STR	;request user to transmit file per xmodem
                     474    474 ;		call	TX_STR_TERM
025d  cd 81 04       475    475 		call	DWNLD	;download file
                     476    476 ;		call	TX_STR_TERM
0260  c3 64 04       477    477 		jp	EO_post_proc
                     478    478 
                     479    479 
                     480    480 
Z80-Assembler		Release 1.4				Page 9
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     481    481 
0263  21 43 0e       482    482 l_41:	ld	HL,HELP		;see comments at label l_0 and following
0266  cd 6d 04       483    483 	call	PAR_CMD
0269  d2 75 02       484    484 	jp	nc,l_42
                     485    485 
026c  21 48 0e       486    486 		ld	HL,CMD_SET
026f  cd 0e 08       487    487 		call	TX_STR
                     488    488 ;		call	TX_STR_TERM
0272  c3 64 04       489    489 		jp	EO_post_proc
                     490    490 
                     491    491 
                     492    492 
                     493    493 
0275  21 c1 0e       494    494 l_42:	ld	HL,EO
0278  cd 6d 04       495    495 	call	PAR_CMD
027b  d2 85 02       496    496 	jp	nc,l_5
                     497    497 	
027e  97             498    498 		sub	A
027f  32 0d 10       499    499 		ld	(ECHO_STS),A
0282  c3 64 04       500    500 		jp	EO_post_proc
                     501    501 	
                     502    502 
                     503    503 
                     504    504 	
                     505    505 
0285  21 7b 0e       506    506 l_5:	ld	HL,VIEW_MEM	;see comments at label l_0 and following
0288  cd 6d 04       507    507 	call	PAR_CMD
028b  d2 9d 02       508    508 	jp	nc,l_8
                     509    509 
028e  21 ee 0c       510    510 		ld	HL,mem_adr16
0291  cd 0e 08       511    511     		call	TX_STR
                     512    512 ;		call	TX_STR_TERM
0294  cd d1 07       513    513 		call	req_number	;ask host for 16 bit number
0297  cd ff 08       514    514 		call	READ_MEM
029a  c3 64 04       515    515 		jp	EO_post_proc
                     516    516 
                     517    517 
                     518    518 
                     519    519 
029d  21 bb 0e       520    520 l_8:	ld	HL,ca_usr_prg		;see comments at label l_0 and following
                     521    521 
02a0  cd 6d 04       522    522 	call	PAR_CMD
02a3  d2 bd 02       523    523 	jp	nc,l_9
                     524    524 
02a6  21 ee 0c       525    525 		ld	HL,mem_adr16
02a9  cd 0e 08       526    526     		call	TX_STR
                     527    527 ;		call	TX_STR_TERM
02ac  cd d1 07       528    528 		call	req_number	;ask host for user program start address
02af  22 15 10       529    529 		ld	(temp0),HL	;backup start address in temp0
02b2  21 ba 02       530    530 		ld	HL,l_ret	;load user program return 
02b5  e5             531    531 		push	HL		;address on stack
02b6  2a 15 10       532    532 		ld	HL,(temp0)	;restore user program start address in HL
02b9  e9             533    533 		jp	(HL)		;jump to user program
02ba  c3 64 04       534    534 l_ret:		jp	EO_post_proc
                     535    535 
                     536    536 
                     537    537 
                     538    538 
                     539    539 
                     540    540 		
Z80-Assembler		Release 1.4				Page 10
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
02bd  21 59 0e       541    541 l_9:	ld	HL,RSTI2C0
02c0  cd 6d 04       542    542 	call	PAR_CMD
02c3  d2 cf 02       543    543 	jp	nc,l_91
                     544    544 
                     545    545 		;resetting i2c0 bus:
02c6  cd 9c 05       546    546 		call	RST_I2C0	;do 10 x LHL on SCL0 while SDA0 = H
02c9  cd 0c 06       547    547 		call	SCL0_IN		;SCL0 = H
02cc  c3 64 04       548    548 		jp	EO_post_proc
                     549    549 	
                     550    550 
                     551    551 
                     552    552 
                     553    553 	
                     554    554 
02cf  21 60 0e       555    555 l_91:	ld	HL,RSTI2C1
02d2  cd 6d 04       556    556 	call	PAR_CMD
02d5  d2 e1 02       557    557 	jp	nc,l_921
                     558    558 
                     559    559 		;resetting i2c1 bus:
02d8  cd a7 05       560    560 		call	RST_I2C1	;do 10 x LHL on SCL1 while SDA1 = H
02db  cd 1c 06       561    561 		call	SCL1_IN		;SCL1 = H
02de  c3 64 04       562    562 		jp	EO_post_proc
                     563    563 
                     564    564 
                     565    565 
02e1  21 ca 0e       566    566 l_921:	ld	HL,i2c1_test
02e4  cd 6d 04       567    567 	call	PAR_CMD
02e7  d2 f0 02       568    568 	jp	nc,l_10
                     569    569 
02ea  cd 9b 0a       570    570 		call	i1test
                     571    571 
02ed  c3 64 04       572    572 		jp	EO_post_proc
                     573    573 
                     574    574 
                     575    575 
                     576    576 
                     577    577 
02f0  21 6c 0e       578    578 l_10:	ld	HL,I2C0P		;access to i2c pio devices
02f3  cd 6d 04       579    579 	call	PAR_CMD
02f6  d2 3c 03       580    580 	jp	nc,l_112
                     581    581 
02f9  cd b4 06       582    582 		call	I2C0_START
                     583    583 
02fc  21 65 0d       584    584 		ld 	HL,p0_sel	;request select code from host
02ff  cd 0e 08       585    585 		call	TX_STR
                     586    586 ;		call	TX_STR_TERM
0302  cd d1 07       587    587 		call	req_number	;get select code from host
0305  f5             588    588 		push	AF
                     589    589 
                     590    590 		;send 8bit device address to slave:
0306  cd 7c 05       591    591 		call	I2C0_tx
0309  d2 64 04       592    592 		jp	nc,EO_post_proc
                     593    593 
030c  f1             594    594 		pop	AF	; check for write or read access requested by host
030d  cb 47          595    595 		bit	0,A			
030f  ca 27 03       596    596 		jp	z,l_651
                     597    597 
0312  21 89 0d       598    598 		ld 	HL,p0_in	;anounce transmission of read value to host
0315  cd 0e 08       599    599 		call	TX_STR
0318  cd 86 06       600    600 		call	I2C0_RX		; returns with slave data byte in C
Z80-Assembler		Release 1.4				Page 11
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     601    601 			
                     602    602 		;transmit data byte to host
                     603    603 		;ld	A,C
031b  cd d3 08       604    604 		call	APP_ACCU	;append value to STD_OUT
031e  cd 07 08       605    605 		call	TX_STD_OUT	;TX input value to host
                     606    606 
0321  cd c2 06       607    607 		call	I2C0_STOP
0324  c3 64 04       608    608 		jp	EO_post_proc
                     609    609 
                     610    610 	
                     611    611 		;write access follows:
                     612    612 				
                     613    613 l_651:		;write byte into slave
0327  21 77 0d       614    614 		ld 	HL,p0_out	;request output value from host
032a  cd 0e 08       615    615 		call	TX_STR
                     616    616 ;		call	TX_STR_TERM
032d  cd d1 07       617    617 		call	req_number	;get output value from host
0330  cd 7c 05       618    618 		call	I2C0_tx
0333  d2 64 04       619    619 		jp	nc,EO_post_proc
                     620    620 
0336  cd c2 06       621    621 		call	I2C0_STOP
0339  c3 64 04       622    622 		jp	EO_post_proc
                     623    623 		
                     624    624 
                     625    625 
                     626    626 
                     627    627 l_112:
033c  21 76 0e       628    628 	ld	HL,I2C1P		;access to i2c pio devices
033f  cd 6d 04       629    629 	call	PAR_CMD
0342  d2 88 03       630    630 	jp	nc,l_11
                     631    631 
0345  cd bb 06       632    632 		call	I2C1_START
                     633    633 
0348  21 6e 0d       634    634 		ld 	HL,p1_sel	;request select code from host
034b  cd 0e 08       635    635 		call	TX_STR
                     636    636 ;		call	TX_STR_TERM
034e  cd d1 07       637    637 		call	req_number	;get select code from host
0351  f5             638    638 		push	AF
                     639    639 
                     640    640 		;send 8bit device address to slave:
0352  cd 8c 05       641    641 		call	I2C1_tx
0355  d2 64 04       642    642 		jp	nc,EO_post_proc
                     643    643 
0358  f1             644    644 		pop	AF
0359  cb 47          645    645 		bit	0,A	; check for write or read access requested by host
035b  ca 73 03       646    646 		jp	z,l_652
                     647    647 
035e  21 92 0d       648    648 		ld	HL,p1_in	;anounce transmission of read value to host
0361  cd 0e 08       649    649 		call	TX_STR
0364  cd 9d 06       650    650 		call	I2C1_RX	; returns with slave data byte in C
                     651    651 		
                     652    652 		;transmit data byte to host
                     653    653 		;ld	A,C
0367  cd d3 08       654    654 		call	APP_ACCU	;append value to STD_OUT
036a  cd 07 08       655    655 		call	TX_STD_OUT	;TX input value to host
                     656    656 		
036d  cd cc 06       657    657 		call	I2C1_STOP
0370  c3 64 04       658    658 		jp	EO_post_proc
                     659    659 
                     660    660 	
Z80-Assembler		Release 1.4				Page 12
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     661    661 		;write access follows:
                     662    662 				
                     663    663 l_652:		;write byte into slave
0373  21 80 0d       664    664 		ld 	HL,p1_out	;request output value from host
0376  cd 0e 08       665    665 		call	TX_STR
                     666    666 ;		call	TX_STR_TERM
0379  cd d1 07       667    667 		call	req_number	;get output value from host
037c  cd 8c 05       668    668 		call	I2C1_tx
037f  d2 64 04       669    669 		jp	nc,EO_post_proc
                     670    670 
0382  cd cc 06       671    671 		call	I2C1_STOP
0385  c3 64 04       672    672 		jp	EO_post_proc
                     673    673 
                     674    674 
                     675    675 
                     676    676 
                     677    677 	
                     678    678 	
0388  21 67 0e       679    679 l_11:	ld	HL,I2C0F		;access to i2c flash devices
038b  cd 6d 04       680    680 	call	PAR_CMD
038e  d2 f3 03       681    681 	jp	nc,l_110
                     682    682 
0391  cd b4 06       683    683 		call	I2C0_START
                     684    684 
0394  21 9b 0d       685    685 		ld	HL,f0_sel	;request device select code from host
0397  cd 0e 08       686    686 		call	TX_STR
                     687    687 ;		call	TX_STR_TERM
039a  cd d1 07       688    688 		call	req_number	;get device select code from host
039d  f5             689    689 		push	AF
                     690    690 
039e  cb 87          691    691 		res	0,A		; clear LSB to indicate write access to slave
03a0  cd 7c 05       692    692 		call	I2C0_tx
03a3  d2 64 04       693    693 		jp	nc,EO_post_proc
                     694    694 
03a6  21 ad 0d       695    695 		ld	HL,f0_adr	;request memory address from host
03a9  cd 0e 08       696    696 		call	TX_STR
                     697    697 ;		call	TX_STR_TERM
03ac  cd d1 07       698    698 		call	req_number	;get memory address from host
03af  cd 7c 05       699    699 		call	I2C0_tx
03b2  d2 64 04       700    700 		jp	nc,EO_post_proc
                     701    701 	
03b5  f1             702    702 		pop	AF		; check for write or read access requested by host
03b6  f5             703    703 		push	AF
03b7  cb 47          704    704 		bit	0,A			
03b9  ca de 03       705    705 		jp	z,l_65
                     706    706 				
                     707    707 		;read access follows:
                     708    708 
                     709    709 		;restart I2C bus 0
03bc  cd 0c 06       710    710 		call	SCL0_IN		;SCL0 = H
03bf  cd b4 06       711    711 		call	I2C0_START
                     712    712 
                     713    713 		;resend 8bit device select code
03c2  f1             714    714 		pop	AF		
03c3  cd 7c 05       715    715 		call	I2C0_tx
03c6  d2 64 04       716    716 		jp	nc,EO_post_proc
                     717    717 
03c9  21 d1 0d       718    718 		ld	HL,f0_dar	; anounce transmission of read byte to host
03cc  cd 0e 08       719    719 		call	TX_STR	
03cf  cd 86 06       720    720 		call	I2C0_RX	; returns with slave data byte in C
Z80-Assembler		Release 1.4				Page 13
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     721    721 
                     722    722 		;forward data byte to host
                     723    723 		;ld	A,C
03d2  cd d3 08       724    724 		call	APP_ACCU	;append value to STD_OUT
03d5  cd 07 08       725    725 		call	TX_STD_OUT	;TX input value to host
03d8  cd c2 06       726    726 		call	I2C0_STOP
03db  c3 64 04       727    727 		jp	EO_post_proc
                     728    728 				
                     729    729 l_65:		;write byte into slave
03de  21 bf 0d       730    730 		ld	HL,f0_daw	;request byte to be written from host
03e1  cd 0e 08       731    731 		call	TX_STR
                     732    732 ;		call	TX_STR_TERM
03e4  cd d1 07       733    733 		call	req_number	;get byte to be written from host
                     734    734 		
03e7  cd 7c 05       735    735 		call	I2C0_tx
03ea  d2 64 04       736    736 		jp	nc,EO_post_proc
                     737    737 
03ed  cd c2 06       738    738 		call	I2C0_STOP
03f0  c3 64 04       739    739 		jp	EO_post_proc
                     740    740 
                     741    741 
                     742    742 
                     743    743 
03f3  21 71 0e       744    744 l_110:	ld	HL,I2C1F		;access to i2c flash devices
03f6  cd 6d 04       745    745 	call	PAR_CMD
03f9  d2 5e 04       746    746 	jp	nc,l_100
                     747    747 
03fc  cd bb 06       748    748 		call	I2C1_START
                     749    749 
03ff  21 a4 0d       750    750 		ld	HL,f1_sel	;request device select code from host
0402  cd 0e 08       751    751 		call	TX_STR
                     752    752 ;		call	TX_STR_TERM
0405  cd d1 07       753    753 		call	req_number	;get device select code from host
0408  f5             754    754 		push	AF
                     755    755 
                     756    756 		;send 8bit device select code to slave:
0409  cb 87          757    757 		res	0,A		; clear LSB to indicate write access to slave
040b  cd 8c 05       758    758 		call	I2C1_tx
040e  d2 64 04       759    759 		jp	nc,EO_post_proc
                     760    760 
0411  21 b6 0d       761    761 		ld	HL,f1_adr	;request memory address from host
0414  cd 0e 08       762    762 		call	TX_STR
                     763    763 ;		call	TX_STR_TERM
0417  cd d1 07       764    764 		call 	req_number	;get memory address from host
041a  cd 8c 05       765    765 		call	I2C1_tx
041d  d2 64 04       766    766 		jp	nc,EO_post_proc
                     767    767 
0420  f1             768    768 		pop	AF		; check for write or read access requested by host
0421  f5             769    769 		push	AF
0422  cb 47          770    770 		bit	0,A			
0424  ca 49 04       771    771 		jp	z,l_653
                     772    772 				
                     773    773 		;read access follows:
                     774    774 
                     775    775 		;restart I2C bus 1
0427  cd 1c 06       776    776 		call	SCL1_IN		;SCL1 = H
042a  cd bb 06       777    777 		call	I2C1_START
                     778    778 
                     779    779 		;resend 8bit device select code
042d  f1             780    780 		pop	AF
Z80-Assembler		Release 1.4				Page 14
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
042e  cd 8c 05       781    781 		call	I2C1_tx
0431  d2 64 04       782    782 		jp	nc,EO_post_proc
                     783    783 
0434  21 da 0d       784    784 		ld	HL,f1_dar	;anounce transmission of data read to host
0437  cd 0e 08       785    785 		call	TX_STR
043a  cd 9d 06       786    786 		call	I2C1_RX	; returns with slave data byte in C
                     787    787 
                     788    788 		;forward data byte to host
                     789    789 		;ld	A,C
043d  cd d3 08       790    790 		call	APP_ACCU	;append value to STD_OUT
0440  cd 07 08       791    791 		call	TX_STD_OUT	;TX input value to host
0443  cd cc 06       792    792 		call	I2C1_STOP
0446  c3 64 04       793    793 		jp	EO_post_proc
                     794    794 
                     795    795 				
                     796    796 l_653:		;write byte into slave
0449  21 c8 0d       797    797 		ld	HL,f1_daw	;request byte to be written from host
044c  cd 0e 08       798    798 		call	TX_STR
                     799    799 ;		call	TX_STR_TERM
044f  cd d1 07       800    800 		call	req_number	;get byte to be written from host
                     801    801 		
0452  cd 8c 05       802    802 		call	I2C1_tx
0455  d2 64 04       803    803 		jp	nc,EO_post_proc
                     804    804 
0458  cd cc 06       805    805 		call	I2C1_STOP
045b  c3 64 04       806    806 		jp	EO_post_proc
                     807    807 
                     808    808 
                     809    809 
                     810    810 
                     811    811 
                     812    812 	;--------------------------------------------------------------
                     813    813 l_100:	;process any other command this way:
                     814    814 ;	call	wait_2
045e  21 e9 0c       815    815 	ld	HL,error	;TX "unkown cmd" 
0461  cd 0e 08       816    816 	call	TX_STR
                     817    817 ;	call	TX_STR_TERM
                     818    818 	
                     819    819 EO_post_proc:
                     820    820 ;	call	wait_2
0464  21 b4 0c       821    821 	ld	HL,prompt		;TX "prompt"
0467  cd 0e 08       822    822 	call	TX_STR
                     823    823 ;	call	TX_STR_TERM
046a  c3 85 01       824    824 	jp	CMD_pre_proc	;go checking CMD_STS
                     825    825 
                     826    826 	
                     827    827 	;-------CMD parsing begin--------------------------------------------------
                     828    828 	;requires HL pointing to CMD to be parsed
                     829    829 PAR_CMD:
046d  11 20 10       830    830 	ld	DE,CMD_PTR
                     831    831 l_51:
0470  1a             832    832 	ld	A,(DE)
0471  ed a1          833    833 	CPI
0473  c2 7e 04       834    834 	jp	nz,l_52 ;if mismatch of first char in cmd buffer, do next parsing
0476  13             835    835 	inc	DE	;prepare next char in cmd buffer		
0477  fe 0d          836    836 	cp	0Dh	;check for end of cmd (CR)	
0479  c2 70 04       837    837 	jp	nz,l_51		;if end of cmd reached
                     838    838 				;and start cmd execution:
                     839    839 				
                     840    840 				;sending of NEW_LINE here removed with V80
Z80-Assembler		Release 1.4				Page 15
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                     841    841 				
047c  37             842    842 	scf		;if match return with carry set
047d  c9             843    843 	RET
                     844    844 
047e  37             845    845 l_52:	scf
047f  3f             846    846 	ccf		;if mismatch return with carry cleared
0480  c9             847    847 	RET
                     848    848 	;-------CMD parsing end--------------------------------------------------
                     849    849 
                     850    850 ;-------CMD post processor end-------------------------------------------------------------------------
                     851    851 
                     852    852 
                     853    853 
                     854    854 
                     855    855 
                     856    856 
                     857    857 
                     858    858 
                     859    859 
                     860    860 
                     861    861 ;-------DOWNLOAD begin--------------------------------------------------------------------
0481  0e 0b          862    862 DWNLD:	ld	C,0Bh		;defines timeout	
                     863    863 
0483  cd 3a 08       864    864 TICKER:	call   	WAIT_2
0486  0d             865    865 	dec	C
0487  79             866    866 	ld	A,C
0488  fe 00          867    867 	cp	0
048a  c2 83 04       868    868 	jp	nz,TICKER
                     869    869 
                     870    870 ;-------------
                     871    871 	;set up TX and RX:
                     872    872 ;	ld	a,00110000b	;write into WR0: error reset, select WR0
                     873    873 ;	out	(SIO_A_C),A
                     874    874 
048d  3e 18          875    875 	ld	a,018h		;write into WR0: channel reset
048f  d3 06          876    876 	out	(SIO_A_C),A
                     877    877 
0491  3e 04          878    878 	ld	a,004h		;write into WR0: select WR4
0493  d3 06          879    879 	out	(SIO_A_C),A
0495  3e 44          880    880 	ld	a,44h		;44h write into WR4: clkx16,1 stop bit, no parity
0497  d3 06          881    881 	out	(SIO_A_C),A
                     882    882 
0499  3e 05          883    883 	ld	a,005h		;write into WR0: select WR5
049b  d3 06          884    884 	out	(SIO_A_C),A
049d  3e e8          885    885 	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
049f  d3 06          886    886 	out	(SIO_A_C),A
                     887    887 
04a1  3e 01          888    888 	ld	a,01h		;write into WR0: select WR1
04a3  d3 07          889    889 	out	(SIO_B_C),A
04a5  3e 04          890    890 	ld	a,00000100b	;no interrupt in CH B, special RX condition affects vect	
04a7  d3 07          891    891 	out	(SIO_B_C),A
                     892    892 
04a9  3e 02          893    893 	ld	a,02h		;write into WR0: select WR2
04ab  d3 07          894    894 	out	(SIO_B_C),A
04ad  3e 10          895    895 	ld	a,10h		;write into WR2: cmd line int vect (see int vec table)
04af  d3 07          896    896 	out	(SIO_B_C),A	;bits D3,D2,D1 are changed according to RX condition
                     897    897 
04b1  97             898    898 	sub	A
04b2  32 15 10       899    899 	ld	(temp0),A	;reset bad blocks counter
04b5  32 00 10       900    900 	ld	(RAM_DATA_STS),A ;clear RAM DATA STS
Z80-Assembler		Release 1.4				Page 16
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
04b8  0e 01          901    901 	ld	C,1h		;C holds first block nr to expect
04ba  2a 11 10       902    902 	ld	HL,(DEST_ADR)	;set lower destinatiion address of user program
                     903    903 
04bd  cd ad 07       904    904 	call	SIO_A_EI
04c0  cd c8 07       905    905 	call	A_RTS_ON
                     906    906 
04c3  cd 66 05       907    907 	call	TX_NAK		;NAK indicates ready for transmission to host
                     908    908 
                     909    909 ;----------------------------
                     910    910 REC_BLOCK:
                     911    911 	;set block transfer mode
04c6  3e 21          912    912 	ld	a,21h		;write into WR0 cmd4 and select WR1
04c8  d3 06          913    913 	out	(SIO_A_C),A
04ca  3e a8          914    914 	ld	a,10101000b	;wait active, interrupt on first RX character
04cc  d3 06          915    915 	out	(SIO_A_C),A	;buffer overrun is a spec RX condition
                     916    916 
04ce  fb             917    917 	ei
04cf  cd c8 07       918    918 	call	A_RTS_ON
04d2  76             919    919 	halt			;await first rx char
04d3  cd bf 07       920    920 	call	A_RTS_OFF
                     921    921 
04d6  3e 01          922    922 	ld	a,01h		;write into WR0: select WR1
04d8  d3 06          923    923 	out	(SIO_A_C),A
04da  3e 28          924    924 	ld	a,00101000b	;wait function inactive
04dc  d3 06          925    925 	out	(SIO_A_C),A
                     926    926 
                     927    927 	;check return code of block reception (e holds return code)
04de  7b             928    928 	ld	a,e		
04df  fe 00          929    929 	cp	0		;block finished, no error
04e1  ca f6 04       930    930 	jp	z,l_210
04e4  fe 02          931    931 	cp	2		;eot found
04e6  ca 01 05       932    932 	jp	z,l_211
04e9  fe 03          933    933 	cp	3		;chk sum error
04eb  ca 0c 05       934    934 	jp	z,l_613
                     935    935 
                     936    936 ;	call	TX_NAK		;other error ?
                     937    937 ;	sub	a
04ee  3e 10          938    938 	ld	a,10h
04f0  32 00 10       939    939 	ld	(RAM_DATA_STS),A; set RAM DATA STS to 10h
04f3  c3 25 05       940    940 	jp	l_612
                     941    941 
04f6  cd 6e 05       942    942 l_210:	call	TX_ACK		;when no error
04f9  0c             943    943 	inc	c		;prepare next block to receive
04fa  97             944    944 	sub	A
04fb  32 15 10       945    945 	ld	(temp0),A	;clear bad block counter
04fe  c3 c6 04       946    946 	jp	REC_BLOCK	
                     947    947 
0501  cd 6e 05       948    948 l_211:	call	TX_ACK		;on eot
0504  3e 01          949    949 	ld	A,01h
0506  32 00 10       950    950 	ld	(RAM_DATA_STS),A; set RAM DATA STS to 01h
0509  c3 25 05       951    951 	jp	l_612	
                     952    952 
050c  cd 66 05       953    953 l_613:	call	TX_NAK		;on chk sum error
050f  37             954    954 	scf
0510  3f             955    955 	ccf			;clear carry flag
0511  11 80 00       956    956 	ld	DE,0080h	;subtract 80h
0514  ed 52          957    957 	sbc	HL,DE		;from HL, so HL is reset to block start address
                     958    958 
0516  3a 15 10       959    959 	ld	A,(temp0)	;count bad blocks in temp0
0519  3c             960    960 	inc	A
Z80-Assembler		Release 1.4				Page 17
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
051a  32 15 10       961    961 	ld	(temp0),A	
051d  fe 09          962    962 	cp	09h
051f  ca 25 05       963    963 	jp	z,l_612		;abort download after 9 attempts to transfer a block
0522  c3 c6 04       964    964 	jp	REC_BLOCK	;repeat block reception
                     965    965 
                     966    966 l_612:
                     967    967 DLD_END:
0525  cd 7d 07       968    968 	call	SIO_A_RESET
0528  c9             969    969 	ret
                     970    970 
                     971    971 	
                     972    972 
                     973    973 ;-------Int routine upon byte available begin---------------------
                     974    974 
                     975    975 BYTE_AVAILABLE:
                     976    976 
                     977    977 EXP_SOH_EOT:
0529  db 04          978    978 	in	A,(SIO_A_D)	;read RX byte into A
052b  fe 01          979    979 l_205:	cp	01h		;check for SOH
052d  ca 39 05       980    980 	jp	z,EXP_BLK_NR
0530  fe 04          981    981 	cp	04h		;check for EOT
0532  c2 5e 05       982    982 	jp	nz,l_2020
0535  1e 02          983    983 	ld	e,2h
0537  ed 4d          984    984 	reti
                     985    985 
                     986    986 	;await block number
                     987    987 EXP_BLK_NR:
0539  db 04          988    988 	in	A,(SIO_A_D)	;read RX byte into A
053b  b9             989    989 	cp	C		;check for match of block nr
053c  c2 5e 05       990    990 	jp	nz,l_2020
                     991    991 
                     992    992 	;await complement of block number
053f  79             993    993 	ld	A,C		;copy block nr to expect into A
0540  2f             994    994 	CPL			;and cpl A
0541  5f             995    995 	ld	E,A		;E holds cpl of block nr to expect
                     996    996 EXP_CPL_BLK_NR:
0542  db 04          997    997 	in	A,(SIO_A_D)	;read RX byte into A
0544  bb             998    998 	cp	E		;check for cpl of block nr
0545  c2 5e 05       999    999 	jp	nz,l_2020
                    1000   1000 
                    1001   1001 	;await data block
0548  16 00         1002   1002 	ld	D,0h		;start value of checksum
054a  06 80         1003   1003 	ld	B,80h		;defines block size 128byte		
                    1004   1004 EXP_DATA:
054c  db 04         1005   1005 	in	A,(SIO_A_D)	;read RX byte into A
054e  77            1006   1006 	ld	(HL),A
054f  82            1007   1007 	add	A,D		;update
0550  57            1008   1008 	ld	D,A		;checksum in D
0551  23            1009   1009 	inc	HL		;dest address +1
0552  10 f8         1010   1010 	djnz	EXP_DATA	;loop until block finished
                    1011   1011 		    
                    1012   1012 EXP_CHK_SUM:
0554  db 04         1013   1013 	in	A,(SIO_A_D)	;read RX byte into A
                    1014   1014 ;	ld	a,045h		;for debug only
0556  ba            1015   1015 	cp	D		;check for checksum match
0557  ca 62 05      1016   1016 	jp	z,l_2021
055a  1e 03         1017   1017 	ld	e,3h
055c  ed 4d         1018   1018 	reti
                    1019   1019 
055e  1e 01         1020   1020 l_2020:	ld	E,1h
Z80-Assembler		Release 1.4				Page 18
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0560  ed 4d         1021   1021 	RETI
0562  1e 00         1022   1022 l_2021:	ld	E,0h
0564  ed 4d         1023   1023 	RETI		;return when block received completely
                    1024   1024 
                    1025   1025 
                    1026   1026 ;---------------------------
                    1027   1027 TX_NAK:	
0566  3e 15         1028   1028 	ld	a,15h	;send NAK 15h to host
0568  d3 04         1029   1029 	out	(SIO_A_D),A
056a  cd 21 08      1030   1030 	call	TX_EMP
056d  c9            1031   1031 	RET
                    1032   1032 
                    1033   1033 TX_ACK:
056e  3e 06         1034   1034 	ld	a,6h	;send AK to host
0570  d3 04         1035   1035 	out	(SIO_A_D),A
0572  cd 21 08      1036   1036 	call	TX_EMP
0575  c9            1037   1037 	RET
                    1038   1038 
                    1039   1039 
                    1040   1040 
                    1041   1041 ;-------Int routine upon RX overflow begin---------------------
                    1042   1042 SPEC_BYTE_COND:			;in case of RX overflow
0576  21 25 05      1043   1043 	ld	HL,DLD_END
0579  e5            1044   1044 	push	HL
057a  ed 4d         1045   1045 	reti
                    1046   1046 
                    1047   1047 
                    1048   1048 ;-------DOWNLOAD end----------------------------------------------------------
                    1049   1049 
                    1050   1050 
                    1051   1051 
                    1052   1052 
                    1053   1053 
                    1054   1054 
                    1055   1055 
                    1056   1056 
                    1057   1057 ;-------I2C SUBROUTINES BEGIN---------------------------------------------
                    1058   1058 ;transmits byte to I2C device on bus 0
                    1059   1059 ;returns with carry cleared if ackn bit not found
                    1060   1060 ;modifies A,B,C,D,HL
057c  cd 4c 06      1061   1061 I2C0_tx:	call	send0_byte
057f  cb 4a         1062   1062 		bit	1,D		; test D register for acknowledge bit
0581  37            1063   1063 		scf
0582  c8            1064   1064 		ret	z		;return if akn bit = L with carry set
                    1065   1065 		;when ACK error on bus - transmit error message to host and stop bus
0583  cd d6 06      1066   1066 		call	TX_error
0586  cd c2 06      1067   1067 		call	I2C0_STOP
0589  37            1068   1068 		scf
058a  3f            1069   1069 		ccf
058b  c9            1070   1070 		ret			;return if akn bit = H with carry cleared
                    1071   1071 
058c  cd 69 06      1072   1072 I2C1_tx:	call	send1_byte
058f  cb 5a         1073   1073 		bit	3,D		; test D register for acknowledge bit
0591  37            1074   1074 		scf
0592  c8            1075   1075 		ret	z		;return if akn bit = L with carry set
                    1076   1076 		;when ACK error on bus - transmit error message to host and stop bus
0593  cd d6 06      1077   1077 		call	TX_error
0596  cd cc 06      1078   1078 		call	I2C1_STOP
0599  37            1079   1079 		scf
059a  3f            1080   1080 		ccf
Z80-Assembler		Release 1.4				Page 19
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
059b  c9            1081   1081 		ret			;return if akn bit = H with carry cleared
                    1082   1082 
                    1083   1083 
                    1084   1084 	
                    1085   1085 RST_I2C0:	;modifies A, B, D
                    1086   1086 		;SDA0 must be H for proper reset
                    1087   1087 		;leaves SDA0 = H and SCL0 = H
059c  06 0a         1088   1088 		ld	B,0Ah	    ; do 10 SCL0 cycles while SDA0 is H
059e  cd b2 05      1089   1089 l_77:		call	SCL0_CYCLE
05a1  10 fb         1090   1090 		djnz	l_77
05a3  cd 0c 06      1091   1091 		call	SCL0_IN
05a6  c9            1092   1092 		ret
                    1093   1093 
                    1094   1094 RST_I2C1:	;modifies A, B, D
                    1095   1095 		;SDA1 must be H for proper reset
                    1096   1096 		;leaves SDA1 = H and SCL1 = H
05a7  06 0a         1097   1097 		ld	B,0Ah	    ; do 10 SCL1 cycles while SDA0 is H
05a9  cd bf 05      1098   1098 l_771:		call	SCL1_CYCLE
05ac  10 fb         1099   1099 		djnz	l_771
05ae  cd 1c 06      1100   1100 		call	SCL1_IN
05b1  c9            1101   1101 		ret
                    1102   1102 
                    1103   1103 SCL0_CYCLE:	;modifies A
                    1104   1104 		;returns D wherin bit 1 represents status of SDA0 while
                    1105   1105 		;SCL0 was H
                    1106   1106 		;leaves SCL0 = L
05b2  cd 2c 06      1107   1107 		call	SCL0_OUT
05b5  cd 0c 06      1108   1108 		call	SCL0_IN
                    1109   1109 		
                    1110   1110 		;look for ackn bit
05b8  db 09         1111   1111 		in	A,(PIO_B_D)
05ba  57            1112   1112 		ld	D,A
05bb  cd 2c 06      1113   1113 		call	SCL0_OUT
05be  c9            1114   1114 		ret
                    1115   1115 
                    1116   1116 SCL1_CYCLE:	;modifies A
                    1117   1117 		;returns D wherin bit 3 represents status of SDA1 while
                    1118   1118 		;SCL1 was H
                    1119   1119 		;leaves SCL1 = L
05bf  cd 3c 06      1120   1120 		call	SCL1_OUT
05c2  cd 1c 06      1121   1121 		call	SCL1_IN
                    1122   1122 		
                    1123   1123 		;look for ackn bit
05c5  db 09         1124   1124 		in	A,(PIO_B_D)
05c7  57            1125   1125 		ld	D,A
05c8  cd 3c 06      1126   1126 		call	SCL1_OUT
05cb  c9            1127   1127 		ret
                    1128   1128 
                    1129   1129 SDA0_IN:	;modifies A	    
                    1130   1130 		;reload PIO B mode
05cc  3a 05 10      1131   1131 		ld	A,(PIO_B_MODE)
05cf  d3 0b         1132   1132 		out	(PIO_B_C),A
                    1133   1133 		;change direction of SDA0 to input
05d1  3a 06 10      1134   1134 		ld	A,(PIO_B_IO_CONF)
05d4  cb cf         1135   1135 		set	1,A
05d6  d3 0b         1136   1136 		out	(PIO_B_C),A
05d8  32 06 10      1137   1137 		ld	(PIO_B_IO_CONF),A
05db  c9            1138   1138 		ret
                    1139   1139 
                    1140   1140 SDA1_IN:	;modifies A	    
Z80-Assembler		Release 1.4				Page 20
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1141   1141 		;reload PIO B mode
05dc  3a 05 10      1142   1142 		ld	A,(PIO_B_MODE)
05df  d3 0b         1143   1143 		out	(PIO_B_C),A
                    1144   1144 		;change direction of SDA1 to input
05e1  3a 06 10      1145   1145 		ld	A,(PIO_B_IO_CONF)
05e4  cb df         1146   1146 		set	3,A
05e6  d3 0b         1147   1147 		out	(PIO_B_C),A
05e8  32 06 10      1148   1148 		ld	(PIO_B_IO_CONF),A
05eb  c9            1149   1149 		ret
                    1150   1150 	
                    1151   1151 SDA0_OUT:	;modifies A
                    1152   1152 		;reload PIO B mode
05ec  3a 05 10      1153   1153 		ld	A,(PIO_B_MODE)
05ef  d3 0b         1154   1154 		out	(PIO_B_C),A
                    1155   1155 		;change direction of SDA0 to output
05f1  3a 06 10      1156   1156 		ld	A,(PIO_B_IO_CONF)
05f4  cb 8f         1157   1157 		res	1,A
05f6  d3 0b         1158   1158 		out	(PIO_B_C),A
05f8  32 06 10      1159   1159 		ld	(PIO_B_IO_CONF),A
05fb  c9            1160   1160 		ret
                    1161   1161 
                    1162   1162 SDA1_OUT:	;modifies A
                    1163   1163 		;reload PIO B mode
05fc  3a 05 10      1164   1164 		ld	A,(PIO_B_MODE)
05ff  d3 0b         1165   1165 		out	(PIO_B_C),A
                    1166   1166 		;change direction of SDA1 to output
0601  3a 06 10      1167   1167 		ld	A,(PIO_B_IO_CONF)
0604  cb 9f         1168   1168 		res	3,A
0606  d3 0b         1169   1169 		out	(PIO_B_C),A
0608  32 06 10      1170   1170 		ld	(PIO_B_IO_CONF),A
060b  c9            1171   1171 		ret
                    1172   1172 
                    1173   1173 SCL0_IN:	;modifies A
                    1174   1174 		;reload PIO B mode
060c  3a 05 10      1175   1175 		ld	A,(PIO_B_MODE)
060f  d3 0b         1176   1176 		out	(PIO_B_C),A
                    1177   1177 		;change direction of SCL0 to input
0611  3a 06 10      1178   1178 		ld	A,(PIO_B_IO_CONF)
0614  cb c7         1179   1179 		set	0,A
0616  d3 0b         1180   1180 		out	(PIO_B_C),A
0618  32 06 10      1181   1181 		ld	(PIO_B_IO_CONF),A
061b  c9            1182   1182 		ret
                    1183   1183 
                    1184   1184 SCL1_IN:	;modifies A
                    1185   1185 		;reload PIO B mode
061c  3a 05 10      1186   1186 		ld	A,(PIO_B_MODE)
061f  d3 0b         1187   1187 		out	(PIO_B_C),A
                    1188   1188 		;change direction of SCL1 to input
0621  3a 06 10      1189   1189 		ld	A,(PIO_B_IO_CONF)
0624  cb d7         1190   1190 		set	2,A
0626  d3 0b         1191   1191 		out	(PIO_B_C),A
0628  32 06 10      1192   1192 		ld	(PIO_B_IO_CONF),A
062b  c9            1193   1193 		ret
                    1194   1194 
                    1195   1195 SCL0_OUT:	;modifies A
                    1196   1196 		;reload PIO B mode
062c  3a 05 10      1197   1197 		ld	A,(PIO_B_MODE)
062f  d3 0b         1198   1198 		out	(PIO_B_C),A
                    1199   1199 		;change direction of SCL0 to output
0631  3a 06 10      1200   1200 		ld	A,(PIO_B_IO_CONF)
Z80-Assembler		Release 1.4				Page 21
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0634  cb 87         1201   1201 		res	0,A
0636  d3 0b         1202   1202 		out	(PIO_B_C),A
0638  32 06 10      1203   1203 		ld	(PIO_B_IO_CONF),A
063b  c9            1204   1204 		ret
                    1205   1205 
                    1206   1206 SCL1_OUT:	;modifies A
                    1207   1207 		;reload PIO B mode
063c  3a 05 10      1208   1208 		ld	A,(PIO_B_MODE)
063f  d3 0b         1209   1209 		out	(PIO_B_C),A
                    1210   1210 		;change direction of SCL1 to output
0641  3a 06 10      1211   1211 		ld	A,(PIO_B_IO_CONF)
0644  cb 97         1212   1212 		res	2,A
0646  d3 0b         1213   1213 		out	(PIO_B_C),A
0648  32 06 10      1214   1214 		ld	(PIO_B_IO_CONF),A
064b  c9            1215   1215 		ret
                    1216   1216 
                    1217   1217 send0_byte:	;requires value to be sent in A
                    1218   1218 		;returns with bit 1 of D holding status of ACKN bit
                    1219   1219 		;and SCL0 = L and SDA0 = H
                    1220   1220 		;modifies A, B, C, D
064c  06 08         1221   1221 		ld	B,8h		; 8 bits are to be clocked out
064e  4f            1222   1222 		ld	C,A		; copy to C reg
064f  cb 21         1223   1223 l_74:		sla	C		; shift MSB of C into carry
0651  da 5a 06      1224   1224 		jp	c,SDA0_H	; when L
0654  cd ec 05      1225   1225 SDA0_L:		call	SDA0_OUT	; pull SDA0 low
0657  c3 5d 06      1226   1226 		jp	l_75
065a  cd cc 05      1227   1227 SDA0_H:		call	SDA0_IN		; release SDA0 to let it go high
065d  cd b2 05      1228   1228 l_75:		call	SCL0_CYCLE	; do SCL0 cycle (LHL)
0660  10 ed         1229   1229 		djnz	l_74		; process next bit of C reg
0662  cd cc 05      1230   1230 		call	SDA0_IN		; release SDA0 to let it go high
0665  cd b2 05      1231   1231 		call	SCL0_CYCLE	; do SCL0 cycle (LHL), bit 1 of D holds ackn bit
0668  c9            1232   1232 		ret
                    1233   1233 
                    1234   1234 send1_byte:	;requires value to be sent in A
                    1235   1235 		;returns with bit 3 of D holding status of ACKN bit
                    1236   1236 		;and SCL1 = L and SDA1 = H
                    1237   1237 		;modifies A, B, C, D
0669  06 08         1238   1238 		ld	B,8h		; 8 bits are to be clocked out
066b  4f            1239   1239 		ld	C,A		; copy to C reg
066c  cb 21         1240   1240 l_741:		sla	C		; shift MSB of C into carry
066e  da 77 06      1241   1241 		jp	c,SDA1_H	; when L
0671  cd fc 05      1242   1242 SDA1_L:		call	SDA1_OUT	; pull SDA1 low
0674  c3 7a 06      1243   1243 		jp	l_751
0677  cd dc 05      1244   1244 SDA1_H:		call	SDA1_IN		; release SDA1 to let it go high
067a  cd bf 05      1245   1245 l_751:		call	SCL1_CYCLE	; do SCL1 cycle (LHL)
067d  10 ed         1246   1246 		djnz	l_741		; process next bit of C reg
067f  cd dc 05      1247   1247 		call	SDA1_IN		; release SDA1 to let it go high
0682  cd bf 05      1248   1248 		call	SCL1_CYCLE	; do SCL1 cycle (LHL), bit 3 of D holds ackn bit
0685  c9            1249   1249 		ret
                    1250   1250 
                    1251   1251 I2C0_RX:	;modifies A, B, D
                    1252   1252 		;returns with slave data byte in C
                    1253   1253 		;leaves SCL0 = L and SDA0 = H
0686  06 08         1254   1254 		ld	B,8h
0688  db 09         1255   1255 l_66:		in	A,(PIO_B_D)
068a  37            1256   1256 		scf
068b  cb 4f         1257   1257 		bit	1,A
068d  c2 91 06      1258   1258 		jp	nz,H0_found	
0690  3f            1259   1259 L0_found:	ccf
0691  cb 11         1260   1260 H0_found:	rl	C
Z80-Assembler		Release 1.4				Page 22
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0693  cd b2 05      1261   1261 		call	SCL0_CYCLE
0696  10 f0         1262   1262 		djnz	l_66
0698  cd b2 05      1263   1263 		call	SCL0_CYCLE	;send NAK to slave
                    1264   1264 		;byte ready in C
069b  79            1265   1265 		ld	A,C
069c  c9            1266   1266 		ret
                    1267   1267 
                    1268   1268 
                    1269   1269 I2C1_RX:	;modifies A, B, D
                    1270   1270 		;returns with slave data byte in C
                    1271   1271 		;leaves SCL1 = L and SDA1 = H
069d  06 08         1272   1272 		ld	B,8h
069f  db 09         1273   1273 l_661:		in	A,(PIO_B_D)
06a1  37            1274   1274 		scf
06a2  cb 5f         1275   1275 		bit	3,A
06a4  c2 a8 06      1276   1276 		jp	nz,H1_found	
06a7  3f            1277   1277 L1_found:	ccf
06a8  cb 11         1278   1278 H1_found:	rl	C
06aa  cd bf 05      1279   1279 		call	SCL1_CYCLE
06ad  10 f0         1280   1280 		djnz	l_661
06af  cd bf 05      1281   1281 		call	SCL1_CYCLE	;send NAK to slave
                    1282   1282 		;byte ready in C
06b2  79            1283   1283 		ld	A,C
06b3  c9            1284   1284 		ret
                    1285   1285 
                    1286   1286 
                    1287   1287 I2C0_START:	;start I2C bus 0
06b4  cd ec 05      1288   1288 		call	SDA0_OUT	;SDA = L
06b7  cd 2c 06      1289   1289 		call	SCL0_OUT	;SCL = L
06ba  c9            1290   1290 		ret
                    1291   1291 
                    1292   1292 I2C1_START:	;start I2C bus 1
06bb  cd fc 05      1293   1293 		call	SDA1_OUT	;SDA = L
06be  cd 3c 06      1294   1294 		call	SCL1_OUT	;SCL = L
06c1  c9            1295   1295 		ret
                    1296   1296 
                    1297   1297 
                    1298   1298 I2C0_STOP:	;stop I2C bus 0
06c2  cd ec 05      1299   1299 		call	SDA0_OUT
06c5  cd 0c 06      1300   1300 		call	SCL0_IN
06c8  cd cc 05      1301   1301 		call	SDA0_IN	
                    1302   1302 		;jp	EO_post_proc
06cb  c9            1303   1303 		ret
                    1304   1304 
                    1305   1305 I2C1_STOP:	;stop I2C bus 1
06cc  cd fc 05      1306   1306 		call	SDA1_OUT
06cf  cd 1c 06      1307   1307 		call	SCL1_IN
06d2  cd dc 05      1308   1308 		call	SDA1_IN	
                    1309   1309 		;jp	EO_post_proc
06d5  c9            1310   1310 		ret
                    1311   1311 
                    1312   1312 
                    1313   1313 ;-------I2C SUBROUTINES END------------------------------------------
                    1314   1314 
                    1315   1315 
                    1316   1316 
                    1317   1317 
                    1318   1318 
                    1319   1319 TX_error:
06d6  21 e9 0c      1320   1320 		ld	HL,error	; TX error message to host
Z80-Assembler		Release 1.4				Page 23
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
06d9  cd 0e 08      1321   1321 		call	TX_STR
                    1322   1322 ;		call	TX_STR_TERM
06dc  c9            1323   1323 		ret
                    1324   1324 
                    1325   1325 
                    1326   1326 
                    1327   1327 
                    1328   1328 ;-------Int. Routine for CT3 zero count begin------------------------------
                    1329   1329 CT3_ZERO:
                    1330   1330 	;flashes D0 and D1 as 2 bit binary counter
06dd  f5            1331   1331 	push	AF
                    1332   1332 
06de  3e cf         1333   1333 	ld	A,0CFh
06e0  d3 0a         1334   1334 	out	(PIO_A_C),A	;set PIO A to bit mode
06e2  3e fc         1335   1335 	ld	A,0FCh
06e4  d3 0a         1336   1336 	out	(PIO_A_C),A	;set io configuration: A0 and A1 are outputs
06e6  3a 0e 10      1337   1337 	ld	A,(TEMP3)
06e9  3c            1338   1338 	inc	A		;inc temp3 content
06ea  d3 08         1339   1339 	out	(PIO_A_D),A	;load temp3 onto pio port A
06ec  32 0e 10      1340   1340 	ld	(TEMP3),A	;save temp3
                    1341   1341 
06ef  f1            1342   1342 	pop	AF
06f0  fb            1343   1343 	EI		;came with V784
06f1  ed 4d         1344   1344 	reti
                    1345   1345 ;-------Int. Routine for CT3 zero count begin------------------------------
                    1346   1346 
                    1347   1347 
                    1348   1348 
                    1349   1349 
                    1350   1350 
                    1351   1351 
                    1352   1352 
                    1353   1353 
                    1354   1354 ;-------SIO INTERRUPT ROUTINES for cmd line mode BEGIN-----------------------------------------
                    1355   1355 
                    1356   1356 
                    1357   1357 ;-------Int Routine upon RX charcter begin-------------------------------------------------
                    1358   1358 RX_CHA_AVAILABLE:
                    1359   1359 ;	ei			;in V841
06f3  f5            1360   1360 	push	AF		;backup AF
06f4  cd bf 07      1361   1361 	call	A_RTS_OFF
                    1362   1362 ;	ld	a,005h		;write into WR0: select WR5
                    1363   1363 ;	out	(SIO_A_C),A
                    1364   1364 ;	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
                    1365   1365 ;	out	(SIO_A_C),A
                    1366   1366 
                    1367   1367 
06f7  db 04         1368   1368 	in	A,(SIO_A_D)	;read RX character into A
                    1369   1369 	;push	AF		;backup RX character
                    1370   1370 	; A holds received character
                    1371   1371 
                    1372   1372 	;add RX character to string in cmd buffer:
06f9  ed 4b 1c 10   1373   1373 	ld	BC,(CMD_LEN)	;BC holds current length of command
06fd  21 20 10      1374   1374 	ld	HL,CMD_PTR	;set HL at begin of cmd buffer
0700  09            1375   1375 	add	HL,BC		;HL now holds pos to store RX char in
                    1376   1376 	;pop	AF		;restore RX char in A
0701  77            1377   1377 	ld	(HL),A		;write RX char where HL points to
                    1378   1378 
0702  fd 21 0d 10   1379   1379 	ld	IY,ECHO_STS	; IY points to ECHO_STS
                    1380   1380 
Z80-Assembler		Release 1.4				Page 24
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1381   1381 	;examine RX character:
0706  fe 0d         1382   1382 	cp	0Dh		;was last RX char a CR ?
0708  ca 2c 07      1383   1383 	jp	z,RX_CR
070b  fe 08         1384   1384 	cp	08h		;was last RX char a BS ?
070d  ca 50 07      1385   1385 	jp	z,RX_BSP
0710  fe 7f         1386   1386         cp	7Fh		;was last RX char a DEL ?
0712  ca 50 07      1387   1387 	jp	z,RX_BSP
                    1388   1388 	
                    1389   1389 	;for any other character:
                    1390   1390 
                    1391   1391 	;if ECHO_STS=FFh TX received char back to host
                    1392   1392 ;	ld	IY,ECHO_STS
0715  fd cb 00 0e   1393   1393 	rrc	(IY+0)		;each rotating of FFh sets carry
0719  d2 24 07      1394   1394 	jp	nc,l_212	;if ECHO_STS<>FFh don't echo an proceed at l_212
                    1395   1395 				;echo character (HL still points at char received last)
071c  d3 04         1396   1396 	out	(SIO_A_D),A	;to host
071e  cd 21 08      1397   1397 	call	TX_EMP
0721  cd 2d 08      1398   1398 	call	RX_EMP
                    1399   1399 
                    1400   1400 l_212:
0724  03            1401   1401 	inc	BC
0725  ed 43 1c 10   1402   1402 	ld	(CMD_LEN),BC	;CMD_LEN holds current lenght of command
                    1403   1403 	;sub	A		;comm. in V841
                    1404   1404 	;ld	(CMD_STS),A	;comm. in V841 ;set or leave CMD status  "incomplete"
                    1405   1405 ;	call	A_RTS_ON	;V877
0729  c3 62 07      1406   1406 	jp	eo_rx_cha_ava
                    1407   1407 ;	pop	AF
                    1408   1408 ;	reti
                    1409   1409 
                    1410   1410 
                    1411   1411 
                    1412   1412 	;-------process cr character begin----------
                    1413   1413 RX_CR:
                    1414   1414 ;	call	SIO_A_DI
                    1415   1415 
072c  fd cb 00 0e   1416   1416 	rrc	(IY+0)		;each rotating of FFh sets carry
0730  d2 3d 07      1417   1417 	jp	nc,l_220	;if ECHO_STS<>FFh don't TX line feed an proceed at l_220
                    1418   1418 				;(ECHO is ON if ECHO_STS=FFh)
                    1419   1419 
0733  21 39 0e      1420   1420 	ld	HL,NEW_LINE	;transmit new line
0736  cd 0e 08      1421   1421 	call	TX_STR
0739  ed 4b 1c 10   1422   1422 	ld	BC,(CMD_LEN)	;TX_STR modifies BC, so restore BC from CMD_LEN
                    1423   1423 
073d  ed 43 1e 10   1424   1424 l_220:  ld	(IN_LEN),BC	;copy CMD_LEN into IN_LEN
                    1425   1425 
0741  3e 01         1426   1426 	ld	A,1
0743  32 02 10      1427   1427 	ld	(CMD_STS),A	;set CMD status to "complete"
                    1428   1428 ;	call	SIO_A_DI	;disable SIO_A interrupts ;in V841
                    1429   1429 
0746  97            1430   1430 	sub	A
0747  32 1c 10      1431   1431 	ld	(CMD_LEN),A	;clear CMD_LEN
074a  32 1d 10      1432   1432 	ld	(CMD_LEN+1),A
                    1433   1433 
                    1434   1434 ;	call	A_RTS_OFF
074d  c3 62 07      1435   1435 	jp	eo_rx_cha_ava
                    1436   1436 
                    1437   1437 ;	pop	AF		;restore AF
                    1438   1438 ;	reti			;leave procedure but do not enable interupts
                    1439   1439 	;-------process cr character end---------------
                    1440   1440 
Z80-Assembler		Release 1.4				Page 25
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1441   1441 
                    1442   1442 
                    1443   1443 	;-------process backspace charcter begin-----------
0750  21 ff ff      1444   1444 RX_BSP:	ld	HL,0FFFFh
0753  09            1445   1445 	add	HL,BC			;carry is set if CMD_LEN>0
0754  d2 62 07      1446   1446 	jp	nc,END_OF_RX_BSP	;do not BACKSPACE if CMD_LEN=0
                    1447   1447 
0757  0b            1448   1448 	dec	BC		;if CMD_LEN>0 then CMD_LEN-1
0758  ed 43 1c 10   1449   1449 	ld	(CMD_LEN),BC	;update CMD_LEN
                    1450   1450 
075c  21 3c 0e      1451   1451 	ld	HL,BS_SP_BS
075f  cd 0e 08      1452   1452 	call	TX_STR
                    1453   1453 ;	call	A_RTS_ON	;V877
                    1454   1454 
                    1455   1455 END_OF_RX_BSP:
                    1456   1456 	;sub 	A		;comm. in V841
                    1457   1457 	;ld	(CMD_STS),A	;comm. in V841 ;set or leave CMD status  "incomplete"
                    1458   1458 ;	pop	AF
                    1459   1459 ;	reti
                    1460   1460 	;-------process backspace character end-----------	
                    1461   1461 
                    1462   1462 eo_rx_cha_ava:
                    1463   1463 ;	call	A_RTS_ON
0762  f1            1464   1464 	pop	AF
                    1465   1465 ;	ei
0763  ed 4d         1466   1466 	reti
                    1467   1467 	
                    1468   1468 ;-------Int Routine upon RX charcter end---------------------------------------------------	
                    1469   1469 
                    1470   1470 
                    1471   1471 
                    1472   1472 ;-------poll CMD_STS loop------------------------------
                    1473   1473 	;waits until "cmd complete"
                    1474   1474 	;modifies all registers
                    1475   1475 poll_CMD_cpl:
                    1476   1476 ;	call	SIO_A_RESET
0765  cd c8 07      1477   1477 	call	A_RTS_ON
                    1478   1478 l_690:
0768  fb            1479   1479 	ei
0769  cd c8 07      1480   1480 	call	A_RTS_ON	;V877
076c  76            1481   1481 	halt
076d  3a 02 10      1482   1482 	ld	A,(CMD_STS)
0770  fe 01         1483   1483 	cp	1h		;poll for "cmd complete"
0772  c2 68 07      1484   1484 	jp	nz,l_690
                    1485   1485 
                    1486   1486 ;	di
0775  97            1487   1487 	sub	A
0776  32 02 10      1488   1488 	ld	(CMD_STS),A
                    1489   1489 ;	call	A_RTS_OFF
                    1490   1490 ;	call	SIO_A_DI
0779  c9            1491   1491 	RET
                    1492   1492 
                    1493   1493 
                    1494   1494 
                    1495   1495 
                    1496   1496 
                    1497   1497 
                    1498   1498 ;-------Int routine upon special RX condition begin---------------------
                    1499   1499 SPEC_RX_CONDITON:
077a  c3 00 00      1500   1500 	jp	WARM_START
Z80-Assembler		Release 1.4				Page 26
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1501   1501 ;-------Int Routine upon special RX condition end--------------------------
                    1502   1502 
                    1503   1503 
                    1504   1504 
                    1505   1505 
                    1506   1506 
                    1507   1507 SIO_A_RESET:
                    1508   1508 	;set up TX and RX:
077d  3e 30         1509   1509 	ld	a,00110000b	;write into WR0: error reset, select WR0
077f  d3 06         1510   1510 	out	(SIO_A_C),A
                    1511   1511 
0781  3e 18         1512   1512 	ld	a,018h		;write into WR0: channel reset
0783  d3 06         1513   1513 	out	(SIO_A_C),A
                    1514   1514 
0785  3e 04         1515   1515 	ld	a,004h		;write into WR0: select WR4
0787  d3 06         1516   1516 	out	(SIO_A_C),A
0789  3e 44         1517   1517 	ld	a,44h		;44h write into WR4: clkx16,1 stop bit, no parity
078b  d3 06         1518   1518 	out	(SIO_A_C),A
                    1519   1519 
078d  3e 05         1520   1520 	ld	a,005h		;write into WR0: select WR5
078f  d3 06         1521   1521 	out	(SIO_A_C),A
0791  3e e8         1522   1522 	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
0793  d3 06         1523   1523 	out	(SIO_A_C),A
                    1524   1524 
0795  3e 01         1525   1525 	ld	a,01h		;write into WR0: select WR1
0797  d3 07         1526   1526 	out	(SIO_B_C),A
0799  3e 04         1527   1527 	ld	a,00000100b	;no interrupt in CH B, special RX condition affects vect	
079b  d3 07         1528   1528 	out	(SIO_B_C),A
                    1529   1529 
079d  3e 02         1530   1530 	ld	a,02h		;write into WR0: select WR2
079f  d3 07         1531   1531 	out	(SIO_B_C),A
07a1  3e 00         1532   1532 	ld	a,0h		;write into WR2: cmd line int vect (see int vec table)
                    1533   1533 				;bits D3,D2,D1 are changed according to RX condition
07a3  d3 07         1534   1534 	out	(SIO_B_C),A
                    1535   1535 
07a5  3e 01         1536   1536 	ld	a,01h		;write into WR0: select WR1
07a7  d3 06         1537   1537 	out	(SIO_A_C),A
07a9  3e 18         1538   1538 	ld	a,00011000b	;interrupt on all RX characters, parity is not a spec RX condition
                    1539   1539 				;buffer overrun is a spec RX condition
07ab  d3 06         1540   1540 	out	(SIO_A_C),A
                    1541   1541 
                    1542   1542 SIO_A_EI:
                    1543   1543 	;enable SIO channel A RX
07ad  3e 03         1544   1544 	ld	a,003h		;write into WR0: select WR3
07af  d3 06         1545   1545 	out	(SIO_A_C),A
                    1546   1546 ;	ld	a,0C1h		;RX 8bit, auto enable off, RX on
07b1  3e e1         1547   1547 	ld	a,0E1h		;RX 8bit, auto enable on, RX on	;v93
07b3  d3 06         1548   1548 	out	(SIO_A_C),A	
                    1549   1549 	;Channel A RX active
07b5  c9            1550   1550 	RET
                    1551   1551 
                    1552   1552 
                    1553   1553 SIO_A_DI:
                    1554   1554 	;disable SIO channel A RX
07b6  3e 03         1555   1555 	ld	a,003h		;write into WR0: select WR3
07b8  d3 06         1556   1556 	out	(SIO_A_C),A
                    1557   1557 ;	ld	a,0C0h		;RX 8bit, auto enable off, RX off
07ba  3e e0         1558   1558 	ld	a,0E0h		;RX 8bit, auto enable on, RX off	;v93
07bc  d3 06         1559   1559 	out	(SIO_A_C),A	
                    1560   1560 	;Channel A RX inactive
Z80-Assembler		Release 1.4				Page 27
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
07be  c9            1561   1561 	ret
                    1562   1562 
                    1563   1563 A_RTS_OFF:
07bf  3e 05         1564   1564 	ld	a,005h		;write into WR0: select WR5
07c1  d3 06         1565   1565 	out	(SIO_A_C),A
07c3  3e e8         1566   1566 	ld	a,0E8h		;DTR active, TX 8bit, BREAK off, TX on, RTS inactive
07c5  d3 06         1567   1567 	out	(SIO_A_C),A
07c7  c9            1568   1568 	ret
                    1569   1569 	
                    1570   1570 A_RTS_ON:
07c8  3e 05         1571   1571 	ld	a,005h		;write into WR0: select WR5
07ca  d3 06         1572   1572 	out	(SIO_A_C),A
07cc  3e ea         1573   1573 	ld	a,0EAh		;DTR active, TX 8bit, BREAK off, TX on, RTS active
07ce  d3 06         1574   1574 	out	(SIO_A_C),A
07d0  c9            1575   1575 	ret
                    1576   1576 
                    1577   1577 
                    1578   1578 
                    1579   1579 ;-------SUBROUTINES BEGIN-------------------------------------------
                    1580   1580 ;-asks host for a number
                    1581   1581 ;-smallest unit is BYTE (so host must send at least 2 characters)
                    1582   1582 ;-half bytes are not accepted (e.g. it is invalid if host sends "123")
                    1583   1583 ;-in case of invalid input a return to EO_post_proc is performed (by manipulation of stack) !
                    1584   1584 ;-does not check content of characters (e.g. result of sending "nice" is unknown)
                    1585   1585 ;-the result of the last 2 characters in this number is returned in A
                    1586   1586 ;-the result of the last 4 characters in this number is returned in HL, wherein H holds high
                    1587   1587 ; byte and L holds low byte:
                    1588   1588 ; (e.g. sending "123456" returns A holding 56h, and HL holding 3456h)
                    1589   1589 ; all other characters get lost
                    1590   1590 ;-modifies all registers except the background registers
                    1591   1591 ;-loads every converted byte into long number storage (lowbyte at lowest address)
                    1592   1592 
                    1593   1593 req_number:	;call 	set_CMD_incpl	;clear CMD status	;comm. V841
                    1594   1594 		;call	SIO_A_EI
                    1595   1595 		;ei			;comm. V841
07d1  cd 65 07      1596   1596 		call	poll_CMD_cpl
07d4  3a 1e 10      1597   1597 		ld	A,(IN_LEN)	;get lowbyte of IN_LEN
07d7  cb 3f         1598   1598 		srl	A		;divide by 2 / A holds number of words in input buffer
07d9  47            1599   1599 		ld	B,A		;copy into B
07da  d2 ea 07      1600   1600 		jp	nc,l_133	;if IN_LEN was odd	
07dd  21 e9 0c      1601   1601 		ld	HL,error	;TX ..?	
07e0  cd 0e 08      1602   1602 		call	TX_STR
07e3  21 64 04      1603   1603 		ld	HL,EO_post_proc	;replace return address on stack by address of EO_post_proc
07e6  33            1604   1604 		inc	SP		
07e7  33            1605   1605 		inc	SP
07e8  e5            1606   1606 		push	HL		
07e9  c9            1607   1607 		ret			;and return
                    1608   1608 		
07ea  11 20 10      1609   1609 l_133:		ld	DE,CMD_PTR
07ed  dd 21 80 10   1610   1610 		ld	IX,NUMBER	;IX points to beginning of long number storage
07f1  c5            1611   1611 l_132:		push	BC		;backup number of words on stack
07f2  cd 4c 08      1612   1612 		call	conv_RX_2ASC2BIN;convert word in input buffer to byte , DE points to word
                    1613   1613 					;A holds result
07f5  dd 77 00      1614   1614 		ld	(IX+0),A	;load A into long number storage
07f8  dd 23         1615   1615 		inc	IX		;advance pointer of long number storage by 1
07fa  13            1616   1616 		inc	DE		;advance DE by two
07fb  13            1617   1617 		inc	DE		;so that it point to next word in input buffer
07fc  c1            1618   1618 		pop	BC		;restore number of words from stack
07fd  cb 40         1619   1619 		bit	0,B		;check for last cycle: bit 0 of counter is set in last cycle
07ff  c2 03 08      1620   1620 		jp	nz,l_135
Z80-Assembler		Release 1.4				Page 28
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0802  67            1621   1621 		ld	H,A
0803  10 ec         1622   1622 l_135:		djnz	l_132		;loop to l_132 until all words are read from buffer
0805  6f            1623   1623 		ld	L,A
0806  c9            1624   1624 		ret			;return
                    1625   1625 				
                    1626   1626 
                    1627   1627 
                    1628   1628 
                    1629   1629 
                    1630   1630 
                    1631   1631 
                    1632   1632 
                    1633   1633 
                    1634   1634 ;-----------------------------------------------------
                    1635   1635 
                    1636   1636 
                    1637   1637 ;TX_STR_TERM:
                    1638   1638 	;modifies HL, A
                    1639   1639 ;	ld	HL,STR_TERM
                    1640   1640 ;	call	TX_STR
                    1641   1641 ;	ret
                    1642   1642 
                    1643   1643 	
                    1644   1644 TX_STD_OUT:
0807  21 40 10      1645   1645 	ld	HL,STD_OUT
080a  cd 0e 08      1646   1646 	call	TX_STR
                    1647   1647 ;	call	TX_STR_TERM
080d  c9            1648   1648 	ret
                    1649   1649 
                    1650   1650 TX_STR: ;TX string, HL points to first byte address
                    1651   1651 	;modifies A, HL , BC
080e  7e            1652   1652 TX_CHA:	ld	a,(HL)
080f  d3 04         1653   1653 	out	(SIO_A_D),A
0811  cd 21 08      1654   1654 	call	TX_EMP
                    1655   1655 ;	call	host_rdy
0814  97            1656   1656 	sub	a
0815  ed a1         1657   1657 	cpi		;look for string termination character 0h
0817  c2 0e 08      1658   1658 	jp	nz,TX_CHA
081a  32 0b 10      1659   1659 	ld	(OUT_LEN),A	;set output string length lowbyte to 0
081d  32 0c 10      1660   1660 	ld	(OUT_LEN+1),A	;set output string length highbyte to 0
0820  c9            1661   1661 	ret
                    1662   1662 
                    1663   1663 
                    1664   1664 TX_EMP:	; check for TX buffer empty
                    1665   1665 	;modifies A
0821  97            1666   1666 	sub	a		;clear a, write into WR0: select RR0
0822  3c            1667   1667 	inc	a		;select RR1
0823  d3 06         1668   1668 	out	(SIO_A_C),A
0825  db 06         1669   1669 	in	A,(SIO_A_C)		;read RRx
0827  cb 47         1670   1670 	bit	0,A
0829  ca 21 08      1671   1671 	jp	z,TX_EMP
082c  c9            1672   1672 	ret
                    1673   1673 	
                    1674   1674 RX_EMP:	; check for RX buffer empty
                    1675   1675 	;modifies A
082d  97            1676   1676 	sub	a		;clear a, write into WR0: select RR0
082e  d3 06         1677   1677 	out	(SIO_A_C),A
0830  db 06         1678   1678 	in	A,(SIO_A_C)	;read RRx
0832  cb 47         1679   1679 	bit	0,A
0834  c8            1680   1680 	ret	z          	;if any rx char left in rx buffer
Z80-Assembler		Release 1.4				Page 29
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0835  db 04         1681   1681 	in	A,(SIO_A_D)     ;read that char
0837  c3 2d 08      1682   1682 	jp	RX_EMP
                    1683   1683 
                    1684   1684 
                    1685   1685 ;v93
                    1686   1686 ;host_rdy:
                    1687   1687 ;	ld	a,10h		; write cmd 2 into WR0: select RR0
                    1688   1688 ;	out	(SIO_A_C),A
                    1689   1689 ;l_551:	in	A,(SIO_A_C)		;read RR0
                    1690   1690 ;	bit	5,A	;when host ready bit 5 (CTS) is H
                    1691   1691 ;	jp	z,l_551
                    1692   1692 ;	ret
                    1693   1693 	
                    1694   1694 ;---------------------------------------------------
                    1695   1695 
                    1696   1696 
                    1697   1697 
                    1698   1698 
                    1699   1699 
                    1700   1700 
                    1701   1701 
                    1702   1702 
                    1703   1703 
                    1704   1704 ;-------delay----------------
                    1705   1705 
                    1706   1706 WAIT_2:	; delay
083a  f5            1707   1707 	push	AF
083b  c5            1708   1708 	push	BC
083c  d5            1709   1709 	push	DE
083d  11 00 05      1710   1710 	ld	de,0500h
0840  10 fe         1711   1711 l_W20:	djnz	l_W20
0842  1b            1712   1712 	dec 	de
0843  7a            1713   1713         ld     	a,d
0844  b7            1714   1714         or     	a      ;update zero flag
0845  c2 40 08      1715   1715 	jp	nz,l_W20
0848  d1            1716   1716 	pop	DE
0849  c1            1717   1717 	pop	BC
084a  f1            1718   1718 	pop	AF
084b  c9            1719   1719         ret
                    1720   1720 
                    1721   1721 
                    1722   1722 
                    1723   1723 
                    1724   1724 
                    1725   1725 
                    1726   1726 
                    1727   1727 
                    1728   1728 
                    1729   1729 
                    1730   1730 ;-------convert 2 received ASCII char to byte begin-----------------------------
                    1731   1731 ;	DE points to input in CMD_PTR and CMD_PTR+1
                    1732   1732 ;	output in A
                    1733   1733 ;	modifies A, B  
                    1734   1734 conv_RX_2ASC2BIN:
                    1735   1735 		;ld	DE,CMD_PTR	;read first char in cmd buffer
084c  d5            1736   1736 		push	DE		;came with V783
084d  1a            1737   1737 		ld	A,(DE)
084e  cb 77         1738   1738 		bit	6,A
0850  ca 58 08      1739   1739 		jp	z,hi_ni_09	;if bit 6 not set,it's below Ah
0853  c6 09         1740   1740 		add	A,9h
Z80-Assembler		Release 1.4				Page 30
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0855  c3 5a 08      1741   1741 		jp	sh_4xl
0858  d6 30         1742   1742 hi_ni_09:	sub	30h		;convert to 4 bit number
085a  cb 27         1743   1743 sh_4xl:		sla	A
085c  cb 27         1744   1744 		sla	A
085e  cb 27         1745   1745 		sla	A
0860  cb 27         1746   1746 		sla	A
0862  47            1747   1747 		ld	B,A		;B[7..4] hold high nibble 
                    1748   1748 
0863  13            1749   1749 		inc	DE		;read 2nd char in cmd buffer
0864  1a            1750   1750 		ld	A,(DE)
0865  cb 77         1751   1751 		bit	6,A
0867  ca 71 08      1752   1752 		jp	z,lo_ni_09	;if bit 6 not set,it's below Ah
086a  c6 09         1753   1753 		add	A,9h
086c  e6 0f         1754   1754 		and	0Fh
086e  c3 73 08      1755   1755 		jp	EO_conv_RX_2ASC2BIN
0871  d6 30         1756   1756 lo_ni_09:	sub	30h		;convert to 4 bit number
                    1757   1757 
                    1758   1758 EO_conv_RX_2ASC2BIN:
0873  b0            1759   1759 		or	B		;A holds result
0874  d1            1760   1760 		pop	DE		;came with V783
0875  c9            1761   1761 		RET
                    1762   1762 ;-------convert 2 received ASCII char to byte end----------------------------
                    1763   1763 
                    1764   1764 
                    1765   1765 
                    1766   1766 
                    1767   1767 
                    1768   1768 ;-------convert byte to 2 ASCII char begin---------------------------
                    1769   1769 ;	input value in A
                    1770   1770 ;	output high nibble in D, low nibble in C
                    1771   1771 ; modifies A,BC,D
                    1772   1772 
                    1773   1773 conv_BYTE2ASC:
0876  4f            1774   1774 		ld	C,A		;backup given byte in C
                    1775   1775 
                    1776   1776 proc_hi_ni:	;process high nibble
0877  e6 f0         1777   1777 		and	0F0h		;clear low nibble
0879  cb 3f         1778   1778 		srl	A		;move high nibble into low nibble
087b  cb 3f         1779   1779 		srl	A
087d  cb 3f         1780   1780 		srl	A
087f  cb 3f         1781   1781 		srl	A
                    1782   1782 
0881  47            1783   1783 		ld	B,A		;backup A in B
0882  3e 09         1784   1784 		ld	A,9		
0884  90            1785   1785 		sub	B
0885  da 8e 08      1786   1786 		jp	c,ni_AF		;nibble > 9 ?
0888  78            1787   1787 		ld	A,B		;restore nibble
0889  c6 30         1788   1788 		add	A,30h		;add 30h to make ASCII char
088b  c3 91 08      1789   1789 		jp	hi_ni_rdy
088e  78            1790   1790 ni_AF:		ld	A,B		;restore nibble
088f  c6 37         1791   1791 		add	A,37h		;add 40h-9h to make ASCII char
0891  57            1792   1792 hi_ni_rdy:	ld	D,A		;high nibble ready in D
                    1793   1793 
                    1794   1794 
                    1795   1795 		;process low nibble
0892  79            1796   1796 		ld	A,C		;restore given byte from C
0893  e6 0f         1797   1797 		and	0Fh		;clear high nibble
0895  47            1798   1798 		ld	B,A		;backup A in B
0896  3e 09         1799   1799 		ld	A,9		
0898  90            1800   1800 		sub	B
Z80-Assembler		Release 1.4				Page 31
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0899  da a2 08      1801   1801 		jp	c,ni_AF2	;nibble > 9 ?
089c  78            1802   1802 		ld	A,B		;restore nibble
089d  c6 30         1803   1803 		add	A,30h		;add 30h to make ASCII char
089f  c3 a5 08      1804   1804 		jp	lo_ni_rdy
08a2  78            1805   1805 ni_AF2:		ld	A,B		;restore nibble
08a3  c6 37         1806   1806 		add	A,37h		;add 40h-9h to make ASCII char
08a5  4f            1807   1807 lo_ni_rdy:	ld	C,A		;low nibble ready in C
                    1808   1808 					;high nibble ready in D
08a6  c9            1809   1809 		RET		
                    1810   1810 ;-------convert byte to 2 ASCII char end---------------------------
                    1811   1811 
                    1812   1812 
                    1813   1813 
                    1814   1814 
                    1815   1815 
                    1816   1816 
                    1817   1817 
                    1818   1818 
                    1819   1819 
                    1820   1820 
                    1821   1821 
                    1822   1822 ;-------RAM size check begin---------------------------------
                    1823   1823 RAM_SIZE_CHK:
                    1824   1824 
08a7  21 00 18      1825   1825 	ld	HL,RAM_BOT	;get RAM bottom as start value
08aa  37            1826   1826     	scf			;set carry flag
08ab  3f            1827   1827 	ccf			;comlpement carry flag
                    1828   1828 l_ER0:	
08ac  06 01         1829   1829 	ld	B,1h		;walking one starts at LSB
                    1830   1830 WALK_1:	
08ae  78            1831   1831 	ld	A,B		;copy to A
08af  77            1832   1832 	ld	(HL),A		;write shift value into RAM
08b0  7e            1833   1833 	ld	A,(HL)		;read shift value back from RAM
08b1  b8            1834   1834 	cp	B
08b2  c2 c0 08      1835   1835 	jp	nz,RAM_RANGE	;if mismatch, top of RAM+1 reached
08b5  cb 20         1836   1836 	sla	B
08b7  d2 ae 08      1837   1837 	jp	nc,WALK_1
                    1838   1838 
08ba  97            1839   1839 	sub	A		;clean up RAM location
08bb  77            1840   1840 	ld	(HL),A
                    1841   1841 
08bc  23            1842   1842 	inc	HL		;inc RAM address
08bd  c3 ac 08      1843   1843 	jp	l_ER0
                    1844   1844 		
                    1845   1845 RAM_RANGE:
08c0  2b            1846   1846 	dec	HL		;last checked address - 1
08c1  22 07 10      1847   1847 	ld	(RAM_TOP),HL
08c4  7c            1848   1848 	ld	A,H
08c5  cd d3 08      1849   1849 	call	APP_ACCU
08c8  2a 07 10      1850   1850 	ld	HL,(RAM_TOP)
08cb  7d            1851   1851 	ld	A,L
08cc  cd d3 08      1852   1852 	call	APP_ACCU
08cf  cd 07 08      1853   1853 	call	TX_STD_OUT
08d2  c9            1854   1854 	ret	
                    1855   1855 ;--------RAM size check end -----------------------------------------------
                    1856   1856 
                    1857   1857 
                    1858   1858 
                    1859   1859 
                    1860   1860 
Z80-Assembler		Release 1.4				Page 32
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1861   1861 
                    1862   1862 
                    1863   1863 ;--------------------------------------------------------------------------
                    1864   1864 APP_ACCU:
                    1865   1865 	;converts A content into 2 ASCII characters in C and D
                    1866   1866 	;C holds low nibble, D holds high nibble
                    1867   1867 	;appends characters in C and D to STD_OUT
                    1868   1868 	;appends 0h as string termination
                    1869   1869 	;increments OUT_LEN by two
                    1870   1870 	;modifies A,BC,DE,IX,IY
                    1871   1871 
08d3  cd 76 08      1872   1872 	call	conv_BYTE2ASC	;converts A to 2xASCII chars in D and C
08d6  41            1873   1873 	ld	B,C
08d7  4a            1874   1874 	ld	C,D		;high nibble in C, low nibble in B
08d8  37            1875   1875 	scf			;set carry flag
                    1876   1876 APP_CHAR:
                    1877   1877 	;requires char to append in C
                    1878   1878 	;returns at label l_933 if carry not set
08d9  f5            1879   1879 	push	AF		;backup carry status
08da  dd 21 40 10   1880   1880 	ld	IX,STD_OUT	;IX points to STD_OUT begin
                    1881   1881 	;ld	A,(OUT_LEN)	;get current output string length
08de  ed 5b 0b 10   1882   1882 	ld	DE,(OUT_LEN)	;get current output string length
08e2  fd 21 0b 10   1883   1883 	ld	IY,OUT_LEN	;IY points to OUT_LEN
                    1884   1884 	;ld	D,0h
                    1885   1885 	;ld	E,A
08e6  dd 19         1886   1886 	add	IX,DE		;IX points to last pos in string
                    1887   1887 
08e8  dd 71 00      1888   1888 	ld	(IX+0),C	;append C to string
08eb  fd 34 00      1889   1889 	inc	(IY+0)		;OUT_LEN+1
08ee  dd 36 01 00   1890   1890 	ld	(IX+1),0h	;append termination string
08f2  f1            1891   1891 	pop	AF		;restore carry status
08f3  d0            1892   1892 l_933:	ret	nc		;return if carry not set
                    1893   1893 
08f4  dd 70 01      1894   1894 	ld	(IX+1),B	;else append B to string (overwrite former termination)
08f7  fd 34 00      1895   1895 	inc	(IY+0)		;OUT_LEN+1
08fa  dd 36 02 00   1896   1896 	ld	(IX+2),0h	;append termination to string
08fe  c9            1897   1897 	RET
                    1898   1898 
                    1899   1899 ;---------------------------------------------------------------------
                    1900   1900 
                    1901   1901 
                    1902   1902 
                    1903   1903 READ_MEM:	;reads memory content starting where HL points to
                    1904   1904 		;transmits row by row, so STD_OUT holds max.  52d characters
                    1905   1905 		;modifies all registers !
08ff  06 10         1906   1906 		ld	B,10h		;read 16 lines
0901  c5            1907   1907 RD_HL_ROW:	push	BC
                    1908   1908 
                    1909   1909 		;load first address of first row in STD_OUT
0902  7c            1910   1910 		ld	A,H		;append high byte of mem address
0903  d9            1911   1911 		EXX			;backup HL in background register
0904  cd d3 08      1912   1912 		call	APP_ACCU
0907  d9            1913   1913 		EXX			;restore HL from background register
0908  7d            1914   1914 		ld	A,L		;append low byte of mem address
0909  d9            1915   1915 		EXX			;backup HL in background register
090a  cd d3 08      1916   1916 		call	APP_ACCU
090d  37            1917   1917 		scf			;add space character
090e  3f            1918   1918 		ccf
090f  0e 20         1919   1919 		ld	C,020h
0911  cd d9 08      1920   1920 		call	APP_CHAR
Z80-Assembler		Release 1.4				Page 33
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0914  d9            1921   1921 		EXX			;restore HL from background register
                    1922   1922 		;first address of first row ready in STD_OUT
                    1923   1923 
0915  06 10         1924   1924 		ld	B,10h		;read 16 columns
0917  7e            1925   1925 RD_HL_COL:	ld	A,(HL)		;read memory content into A
0918  d9            1926   1926 		EXX			;backup HL in background register
0919  cd d3 08      1927   1927 		call	APP_ACCU
091c  37            1928   1928 		scf			;append space character
091d  3f            1929   1929 		ccf
091e  0e 20         1930   1930 		ld	C,020h
0920  cd d9 08      1931   1931 		call	APP_CHAR
0923  d9            1932   1932 		EXX			;restore HL from background register
0924  23            1933   1933 		inc	HL		;HL points to next mem position	
0925  10 f0         1934   1934 		djnz	RD_HL_COL	;loop until 16 columns are read
0927  d9            1935   1935 		EXX			;backup HL in background register
0928  cd 07 08      1936   1936 		call	TX_STD_OUT	;TX row to host
092b  21 39 0e      1937   1937 		ld	HL,NEW_LINE	;transmit new line
092e  cd 0e 08      1938   1938 		call	TX_STR
0931  d9            1939   1939 		EXX			;restore HL from background register
0932  c1            1940   1940 		pop	BC		;restore BC from stack
0933  10 cc         1941   1941 		djnz	RD_HL_ROW	;loop until 16 rows are read
0935  c9            1942   1942 		ret
                    1943   1943 
                    1944   1944 ;----------------------------------------------------------------------------
                    1945   1945 div_by_2:	
                    1946   1946 ;divides content of BC by 2
                    1947   1947 ;writes the result back into BC !
                    1948   1948 ;modifies BC
0936  cb 38         1949   1949 		srl	B
0938  da 3e 09      1950   1950 		jp	c,l_713
093b  cb 39         1951   1951 		srl	C
093d  c9            1952   1952 		ret
093e  cb 39         1953   1953 l_713:		srl	C
0940  cb f9         1954   1954 		set	7,C
0942  c9            1955   1955 		ret
                    1956   1956 
                    1957   1957 
                    1958   1958 	
                    1959   1959 
                    1960   1960 ;----------------------------------------------------------------------------
                    1961   1961 TX_NUMBER:
                    1962   1962 ;transfers long number to host
                    1963   1963 ;HL points to low byte of number
                    1964   1964 ;BC holds number of bytes
                    1965   1965 ;modifies A, HL, BC
0943  09            1966   1966 		add	HL,BC		
0944  2b            1967   1967 l_844:		dec	HL		;HL points to high byte of number
0945  7e            1968   1968 		ld	A,(HL)
0946  c5            1969   1969 		push	BC
0947  cd d3 08      1970   1970 		call	APP_ACCU	;append byte to STD_OUT
094a  c1            1971   1971 		pop	BC
094b  0b            1972   1972 		dec	BC		;number of bytes - 1
094c  78            1973   1973 		ld	A,B
094d  fe 00         1974   1974 		cp	0		;test high byte of BC for 0
094f  c2 44 09      1975   1975 		jp	nz,l_844	;if yes,
0952  79            1976   1976 		ld	A,C		
0953  fe 00         1977   1977 		cp	0		;test low byte of BC for 0
0955  c2 44 09      1978   1978 		jp	nz,l_844	;if yes,
0958  cd 07 08      1979   1979 		call	TX_STD_OUT	;TX input value to host
095b  c9            1980   1980 		ret
Z80-Assembler		Release 1.4				Page 34
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    1981   1981 ;-----------------------------------------------------------------------------
                    1982   1982 
                    1983   1983 
                    1984   1984 
                    1985   1985 
                    1986   1986 req_snd:	;requests source, number, destination address
095c  21 f8 0c      1987   1987 		ld	HL,source16
095f  cd 0e 08      1988   1988 		call	TX_STR
                    1989   1989 ;		call	TX_STR_TERM
0962  cd d1 07      1990   1990 		call	req_number	;get source address from host
0965  22 0f 10      1991   1991 		ld	(SOURCE_ADR),HL
                    1992   1992 req_nd:
0968  21 17 0d      1993   1993 		ld	HL,count16
096b  cd 0e 08      1994   1994 		call	TX_STR
                    1995   1995 ;		call	TX_STR_TERM
096e  cd d1 07      1996   1996 		call	req_number	;get number of bytes to burn from host
0971  22 13 10      1997   1997 		ld	(NUMB_OF_BYTES),HL
                    1998   1998 req_d:
0974  21 05 0d      1999   1999 		ld	HL,destin16
0977  cd 0e 08      2000   2000 		call	TX_STR
                    2001   2001 ;		call	TX_STR_TERM
097a  cd d1 07      2002   2002 		call	req_number	;get destination address from host
097d  22 11 10      2003   2003 		ld	(DEST_ADR),HL
                    2004   2004 
                    2005   2005 		;prepare block transfer and search commands like ldi, cpi, cpir, ldir
0980  2a 0f 10      2006   2006 		ld	HL,(SOURCE_ADR)
0983  ed 5b 11 10   2007   2007 		ld	DE,(DEST_ADR)
0987  ed 4b 13 10   2008   2008 		ld	BC,(NUMB_OF_BYTES)
098b  c9            2009   2009 		ret
                    2010   2010 
                    2011   2011 
                    2012   2012 
                    2013   2013 
098c  21 29 0d      2014   2014 fill_mem:	ld	HL,new_dat
098f  cd 0e 08      2015   2015 		call	TX_STR
                    2016   2016 ;		call	TX_STR_TERM
0992  cd d1 07      2017   2017 		call	req_number	;get fill value from host
0995  32 01 10      2018   2018 		ld	(SCRATCH),A	;save fill value in scratch
                    2019   2019 
0998  cd 68 09      2020   2020 		call	req_nd		;request number, destination address
                    2021   2021 		
099b  ed 5b 11 10   2022   2022 		ld	DE,(DEST_ADR)
099f  ed 4b 13 10   2023   2023 		ld	BC,(NUMB_OF_BYTES)
                    2024   2024 l_fi0:
09a3  21 01 10      2025   2025 		ld	HL,SCRATCH	;set source pointer to scratch
09a6  ed a0         2026   2026 		ldi			;copy fill value (from scratch) to destination address
09a8  ea a3 09      2027   2027 		jp	pe,l_fi0	;loop until block filled
09ab  c9            2028   2028 		ret
                    2029   2029 
                    2030   2030 
                    2031   2031 cmp_mem:
                    2032   2032 		;ld	HL,(SOURCE_ADR)
                    2033   2033 		;ld	DE,(DEST_ADR)
                    2034   2034 		;ld	BC,(NUMB_OF_BYTES)
09ac  1a            2035   2035 l_cmp0:		ld	A,(DE)		;load data at dest. address into A
09ad  32 01 10      2036   2036 		ld	(SCRATCH),A	;place copy of data in scratch
09b0  ed a1         2037   2037 		cpi			;cmp data at source address with data at dest. addr.
09b2  c2 ba 09      2038   2038 		jp	nz,l_cmp_err
09b5  13            2039   2039 		inc	DE		;advance dest. pointer
09b6  ea ac 09      2040   2040 		jp	pe,l_cmp0	;loop until byte counter bc is 0
Z80-Assembler		Release 1.4				Page 35
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
09b9  c9            2041   2041 		ret
09ba  2b            2042   2042 l_cmp_err:	dec	HL		;set source pointer back at address where error occured
09bb  e5            2043   2043 		push 	HL		;save current source address
09bc  d5            2044   2044 		push	DE		;save current dest. address
                    2045   2045 
09bd  21 e9 0c      2046   2046 		ld	HL,error	;tx "..?"
09c0  cd 0e 08      2047   2047 		call	TX_STR
09c3  21 f5 0d      2048   2048 		ld	HL,at		;tx "at"
09c6  cd 0e 08      2049   2049 		call	TX_STR
                    2050   2050 
09c9  d1            2051   2051 		pop	DE		;restore current dest. address
09ca  7a            2052   2052 		ld	A,D
09cb  d5            2053   2053 		push	DE
09cc  cd d3 08      2054   2054 		call	APP_ACCU
09cf  d1            2055   2055 		pop	DE
09d0  7b            2056   2056 		ld	A,E
09d1  cd d3 08      2057   2057 		call	APP_ACCU
09d4  cd 07 08      2058   2058 		call	TX_STD_OUT	;tx current dest. address to host
                    2059   2059 		
09d7  21 fb 0d      2060   2060 		ld	HL,expect	;tx "exp:" to host
09da  cd 0e 08      2061   2061 		call	TX_STR
09dd  e1            2062   2062 		pop	HL		;restore current source address
09de  7e            2063   2063 		ld	A,(HL)
09df  cd d3 08      2064   2064 		call	APP_ACCU
09e2  cd 07 08      2065   2065 		call	TX_STD_OUT	;tx current source address to host
                    2066   2066 		
09e5  21 07 0e      2067   2067 		ld	HL,read		;tx "read:"
09e8  cd 0e 08      2068   2068 		call	TX_STR	
                    2069   2069 
09eb  3a 01 10      2070   2070 		ld	A,(SCRATCH)	;restore from scratch data read at dest. address
09ee  cd d3 08      2071   2071 		call	APP_ACCU
09f1  cd 07 08      2072   2072 		call	TX_STD_OUT	;tx corrupted data to host
                    2073   2073 
09f4  c9            2074   2074 		ret
                    2075   2075 
                    2076   2076 ;----------flash programming----------------------------------------
                    2077   2077 		
                    2078   2078 fl_prog:	;programs data into flash page wise
09f5  21 39 0e      2079   2079 		ld	HL,NEW_LINE	;transmit new line
09f8  cd 0e 08      2080   2080 		call	TX_STR
09fb  2a 0f 10      2081   2081 		ld	HL,(SOURCE_ADR)
09fe  ed 5b 11 10   2082   2082 		ld	DE,(DEST_ADR)
0a02  ed 4b 13 10   2083   2083 		ld	BC,(NUMB_OF_BYTES)
                    2084   2084 
0a06  cd 87 0a      2085   2085 		call	rd_reset	;device reset
                    2086   2086 
0a09  cd 90 0a      2087   2087 l_prg0:		call	l_AA55
0a0c  3e a0         2088   2088 		ld	A,0A0h
0a0e  32 55 d5      2089   2089 		ld	(0D555h),A	;5555h
                    2090   2090 
0a11  e5            2091   2091 		push	HL
0a12  dd e1         2092   2092 		pop	IX		;IX holds PA
0a14  7e            2093   2093 		ld	A,(HL)		;A holds PD
0a15  32 01 10      2094   2094 		ld	(scratch),A	;backup PD
0a18  ed a0         2095   2095 		ldi			;copy source_adr to dest_adr, dec bc
0a1a  08            2096   2096 		ex	af,af'		;backup psw in background
                    2097   2097 
                    2098   2098 po_dq7:		;poll DQ7
0a1b  3a 01 10      2099   2099 		ld	A,(scratch)	;restore PD
0a1e  dd ae 00      2100   2100 		xor	(IX+0)		;compare PD with data read from flash
Z80-Assembler		Release 1.4				Page 36
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0a21  cb 7f         2101   2101 		bit	7,A
0a23  ca 42 0a      2102   2102 		jp	z,l_pas0	;pass when DQ7 read = PD DQ7
                    2103   2103 
                    2104   2104 		;poll DQ5
0a26  dd cb 00 6e   2105   2105 		bit	5,(IX+0)
0a2a  ca 1b 0a      2106   2106 		jp	z,po_dq7	;if DQ5=0 go to po_dq7
                    2107   2107 
                    2108   2108 		;if DQ5=1 poll DQ7
0a2d  3a 01 10      2109   2109 		ld	A,(scratch)	;restore PD
0a30  dd ae 00      2110   2110 		xor	(IX+0)		;compare PD with data read from flash
0a33  cb 7f         2111   2111 		bit	7,A
0a35  ca 42 0a      2112   2112 		jp	z,l_pas0	;pass when DQ7 read = PD DQ7
                    2113   2113 
0a38  08            2114   2114 fail:		ex	af,af'
0a39  21 ee 0d      2115   2115 		ld	HL,flashfail
0a3c  cd 0e 08      2116   2116 		call	tx_str
0a3f  c3 87 0a      2117   2117 		jp	rd_reset	;reset device
                    2118   2118 
0a42  08            2119   2119 l_pas0:		ex	af,af'
0a43  e2 87 0a      2120   2120 		jp	po,rd_reset	;reset device if no more bytes are left to load
0a46  c3 09 0a      2121   2121 		jp	l_prg0
                    2122   2122 
                    2123   2123 ;-----------------------------
                    2124   2124 
                    2125   2125 
                    2126   2126 fl_erase:	;erases complete flash
0a49  cd 87 0a      2127   2127 		call	rd_reset	;device reset
                    2128   2128 
0a4c  cd 90 0a      2129   2129 		call	l_AA55
0a4f  3e 80         2130   2130 		ld	A,080h
0a51  32 55 d5      2131   2131 		ld	(0D555h),A	;5555h
0a54  cd 90 0a      2132   2132 		call	l_AA55
0a57  3e 10         2133   2133 		ld	A,010h
0a59  32 55 d5      2134   2134 		ld	(0D555h),A	;5555h
                    2135   2135 		
                    2136   2136 fl_er0:		;poll DQ7
0a5c  3a 55 d5      2137   2137 		ld	A,(0D555h)	;read from any flash address (e.g. 5555h)
0a5f  cb 7f         2138   2138 		bit	7,A		;as long as DQ7=0
0a61  ca 5c 0a      2139   2139 		jp	z,fl_er0
0a64  c3 87 0a      2140   2140 		jp	rd_reset
                    2141   2141 
                    2142   2142 ;-----------------------------
                    2143   2143 
                    2144   2144 id_check:	;reads flash id code. must be 01A4h for AM29F040 type
                    2145   2145 		;modifies all registers
0a67  cd 87 0a      2146   2146 		call	rd_reset	;device reset		
                    2147   2147 
0a6a  21 e3 0d      2148   2148 		ld	HL,fl_id
0a6d  cd 0e 08      2149   2149 		call	TX_STR
                    2150   2150 				
0a70  cd 90 0a      2151   2151 		call	l_AA55
0a73  3e 90         2152   2152 		ld	A,090h		;v94
0a75  32 55 d5      2153   2153 		ld	(0D555h),A	;5555h
                    2154   2154 		
0a78  3a 00 80      2155   2155 		ld	A,(08000h)	;0h
0a7b  cd d3 08      2156   2156 		call	APP_ACCU
0a7e  3a 01 80      2157   2157 		ld	A,(08001h)	;1h
0a81  cd d3 08      2158   2158 		call	APP_ACCU
                    2159   2159 
0a84  cd 07 08      2160   2160 		call	TX_STD_OUT	;TX id code to host
Z80-Assembler		Release 1.4				Page 37
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2161   2161 
                    2162   2162 		
                    2163   2163 rd_reset:	;device reset
0a87  cd 90 0a      2164   2164 		call	l_AA55
0a8a  3e f0         2165   2165 		ld	A,0F0h
0a8c  32 55 d5      2166   2166 		ld	(0D555h),A	;5555h
0a8f  c9            2167   2167 		ret			;normal mode reached
                    2168   2168 
                    2169   2169 ;------------------
                    2170   2170 
                    2171   2171 
                    2172   2172 l_AA55:		;modifies A
0a90  3e aa         2173   2173 		ld	A,0AAh
0a92  32 55 d5      2174   2174 		ld	(0D555h),A	;5555h
0a95  3e 55         2175   2175 		ld	A,055h
0a97  32 aa aa      2176   2176 		ld	(0AAAAh),A	;2AAAh
0a9a  c9            2177   2177 		ret
                    2178   2178 
                    2179   2179 
                    2180   2180 
                    2181   2181 
                    2182   2182 
                    2183   2183 ;-----------I2C Bus 1 test ----------------------------------------------------------
                    2184   2184 i1test:
                    2185   2185 		;init error code
0a9b  dd 21 15 10   2186   2186 		ld	IX,temp0
0a9f  dd 36 00 00   2187   2187 		ld	(IX+0),0	;preload error code
0aa3  dd 36 01 05   2188   2188 		ld	(IX+1),05h	;preload test data counter (5 x write/read)
                    2189   2189 		
0aa7  fd 21 01 10   2190   2190 		ld	IY,scratch
0aab  fd 36 00 f0   2191   2191 		ld	(IY+0),0F0h	;set duration of i2c expander test
                    2192   2192 
                    2193   2193 ;--------------write test data into flash--------------------------
0aaf  21 0f 0e      2194   2194 		ld 	HL,i2cflash
0ab2  cd 0e 08      2195   2195 		call	TX_STR
0ab5  21 39 0e      2196   2196 	    	ld	HL,NEW_LINE	;transmit new line
0ab8  cd 0e 08      2197   2197 		call	TX_STR
                    2198   2198 
                    2199   2199 
0abb  cd bb 06      2200   2200 l_150:		call	I2C1_START
                    2201   2201 
0abe  3e a0         2202   2202 		ld	A,0A0h		;load i2c flash dev code
0ac0  cd 8c 05      2203   2203 		call	I2C1_tx
0ac3  da cd 0a      2204   2204 		jp	c,l_151		;if no ackn error go l_151
0ac6  dd 36 00 10   2205   2205 		ld	(IX+0),10h	;set err code to 10h (ackn error on flash dev select)
0aca  c3 7a 0b      2206   2206 		jp	EO_i1test
                    2207   2207 		
0acd  97            2208   2208 l_151:		sub	A		;address 0 is to be written
0ace  cd 8c 05      2209   2209 		call	I2C1_tx
0ad1  da db 0a      2210   2210 		jp	c,l_152		;if no ackn error go l_152
0ad4  dd 36 00 11   2211   2211 		ld	(IX+0),11h	;set err code to 11h (ackn error on flash mem addr select)
0ad8  c3 7a 0b      2212   2212 		jp	EO_i1test
                    2213   2213 
0adb  dd 7e 01      2214   2214 l_152:		ld	A,(IX+1)	;write test data to mem address
0ade  cd 8c 05      2215   2215 		call	I2C1_tx
0ae1  da eb 0a      2216   2216 		jp	c,l_153		;if no ackn error go l_153
0ae4  dd 36 00 12   2217   2217 		ld	(IX+0),12h	;set err code to 12h (ackn error on data write)
0ae8  c3 7a 0b      2218   2218 		jp	EO_i1test
                    2219   2219 
0aeb  cd cc 06      2220   2220 l_153:		call	I2C1_STOP
Z80-Assembler		Release 1.4				Page 38
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2221   2221 
                    2222   2222 ;--------------read test data from flash----------------------------
0aee  cd 3a 08      2223   2223 lesen:		call	wait_2
0af1  cd bb 06      2224   2224 		call	I2C1_START
                    2225   2225 
0af4  3e a0         2226   2226 		ld	A,0A0h		;load i2c flash dev code
0af6  cd 8c 05      2227   2227 		call	I2C1_tx
0af9  da 03 0b      2228   2228 		jp	c,l_154		;if no ackn error go l_154
0afc  dd 36 00 13   2229   2229 		ld	(IX+0),13h	;set err code to 13h (ackn error on flash dev select)
0b00  c3 7a 0b      2230   2230 		jp	EO_i1test
                    2231   2231 
0b03  97            2232   2232 l_154:		sub	A		;address 0 is to be read		
0b04  cd 8c 05      2233   2233 		call	I2C1_tx
                    2234   2234 ;		scf			;for
                    2235   2235 ;		ccf			;debug only !
0b07  da 11 0b      2236   2236 		jp	c,l_1541	;if no ackn error go l_1541
0b0a  dd 36 00 14   2237   2237 		ld	(IX+0),14h	;set err code to 14h (ackn error on flash mem addr select)
0b0e  c3 7a 0b      2238   2238 		jp	EO_i1test
                    2239   2239 		
                    2240   2240 l_1541:		;restart I2C bus 0
0b11  cd 1c 06      2241   2241 		call	SCL1_IN		;SCL0 = H
0b14  cd bb 06      2242   2242 		call	I2C1_START
                    2243   2243 
                    2244   2244 		;resend 8bit device select code
0b17  3e a1         2245   2245 		ld	a,0A1h		;load i2c flash dev code with r/w bit set
0b19  cd 8c 05      2246   2246 		call	I2C1_tx
                    2247   2247 ;		scf			;for
                    2248   2248 ;		ccf			;debug only !
0b1c  da 26 0b      2249   2249 		jp	c,l_1542	;if no ackn error go l_1542
0b1f  dd 36 00 15   2250   2250 		ld	(IX+0),15h	;set err code to 15h (ackn error on flash mem addr select)
0b23  c3 7a 0b      2251   2251 		jp	EO_i1test
                    2252   2252 
0b26  cd 9d 06      2253   2253 l_1542:		call	I2C1_RX		;returns with slave data byte in C
0b29  dd 7e 01      2254   2254 		ld	A,(IX+1)
                    2255   2255 ;		inc	A		;for debug only
0b2c  b9            2256   2256 		cp	C
0b2d  ca 37 0b      2257   2257 		jp	z,l_1543	;if no ackn error go l_1542
0b30  dd 36 00 16   2258   2258 		ld	(IX+0),16h	;set err code to 16h (error on flash data read)
0b34  c3 7a 0b      2259   2259 		jp	EO_i1test
                    2260   2260 	
0b37  cd cc 06      2261   2261 l_1543:		call	I2C1_STOP
0b3a  dd 35 01      2262   2262 		dec	(IX+1)		;test data counter - 1
                    2263   2263 					;when 0 reached i2c flash test done, leaving data 01h at 
                    2264   2264 					;address 00h of flash
0b3d  c2 bb 0a      2265   2265 		jp	nz,l_150
                    2266   2266 
                    2267   2267 ;-------------write to i2c expander------------------------------		
                    2268   2268 
0b40  21 1e 0e      2269   2269 		ld 	HL,i2cpio	
0b43  cd 0e 08      2270   2270 		call	TX_STR
0b46  21 39 0e      2271   2271 	    	ld	HL,NEW_LINE	;transmit new line
0b49  cd 0e 08      2272   2272 		call	TX_STR
                    2273   2273 
0b4c  cd bb 06      2274   2274 		call	I2C1_START
                    2275   2275 
0b4f  3e 40         2276   2276 l_156:		ld	A,040h		;load i2c expander dev code
0b51  cd 8c 05      2277   2277 		call	I2C1_tx
0b54  da 5e 0b      2278   2278 		jp	c,l_155		;if no ackn error go l_155
0b57  dd 36 00 17   2279   2279 		ld	(IX+0),17h	;set err code to 17h (ackn error on expander dev select)
0b5b  c3 7a 0b      2280   2280 		jp	EO_i1test
Z80-Assembler		Release 1.4				Page 39
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2281   2281 		
0b5e  dd 7e 01      2282   2282 l_155:		ld	A,(IX+1)	;load test data into device
0b61  cd 8c 05      2283   2283 		call	I2C1_tx
0b64  da 6e 0b      2284   2284 		jp	c,l_157		;if no ackn error go l_157
0b67  dd 36 00 18   2285   2285 		ld	(IX+0),18h	;set err code to 18h (ackn error on expander data write)
0b6b  c3 7a 0b      2286   2286 		jp	EO_i1test
0b6e  dd 34 01      2287   2287 l_157:		inc 	(IX+1)		;inc test data counter
0b71  c2 5e 0b      2288   2288 		jp	nz,l_155	;end loop on overflow of test data counter
                    2289   2289 		
0b74  fd 35 00      2290   2290 		dec	(IY+0)		;IY points to duration value of this test
0b77  c2 5e 0b      2291   2291 		jp	nz,l_155	
                    2292   2292 		;FFh is left on data port of expander
                    2293   2293 		    		
0b7a  cd cc 06      2294   2294 EO_i1test:	call	I2C1_STOP
                    2295   2295 		
                    2296   2296 		;transmit error code to host
0b7d  3a 15 10      2297   2297 		ld	a,(temp0)
0b80  cd d3 08      2298   2298 		call	APP_ACCU	;append value to STD_OUT
0b83  cd 07 08      2299   2299 		call	TX_STD_OUT	;TX input value to host
                    2300   2300 
0b86  c9            2301   2301 		ret
                    2302   2302 
                    2303   2303 ;---------PIO test---------------------------
                    2304   2304 p_test:
0b87  21 2e 0e      2305   2305 		ld 	HL,pio_ab
0b8a  cd 0e 08      2306   2306 		call	TX_STR
0b8d  21 39 0e      2307   2307 	    	ld	HL,NEW_LINE	;transmit new line
0b90  cd 0e 08      2308   2308 		call	TX_STR
                    2309   2309 
0b93  3e 0f         2310   2310 		ld	a,0fh		;port A and B in output mode
0b95  d3 0a         2311   2311 		out	(PIO_A_C),A
                    2312   2312 ;		ld	a,0fh
0b97  d3 0b         2313   2313 		out	(PIO_B_C),A
                    2314   2314 
                    2315   2315 
0b99  06 a0         2316   2316 		ld	B,0A0h		;set duration of test
0b9b  21 00 00      2317   2317 l_pt1:		ld	HL,0000h	;set start value
0b9e  11 01 00      2318   2318 		ld	DE,0001h	;set step widht
0ba1  7d            2319   2319 l_pt0:		ld	A,L
0ba2  d3 08         2320   2320 		out	(PIO_A_D),A	;load lowbyte into port A
0ba4  7c            2321   2321 		ld	A,H
0ba5  f6 0c         2322   2322 		or	0Ch		;set B2 and B3 high
0ba7  d3 09         2323   2323 		out	(PIO_B_D),A	;load highbyte into port B
0ba9  19            2324   2324 		ADD	HL,DE		;advance test data counter by one
0baa  d2 a1 0b      2325   2325 		jp	nc,l_pt0
0bad  10 ec         2326   2326 		djnz	l_pt1
                    2327   2327 		;FFh is left in output data register of port A and B
                    2328   2328 
0baf  3e 4f         2329   2329 		ld	a,4fh		;port A and B in input mode
0bb1  d3 0a         2330   2330 		out	(PIO_A_C),A
0bb3  d3 0b         2331   2331 		out	(PIO_B_C),A
0bb5  c9            2332   2332 		ret
                    2333   2333 
                    2334   2334 
                    2335   2335 reg_dump:
                    2336   2336 ;		call	show_reg
                    2337   2337 ;		ex	AF,AF'
                    2338   2338 ;		exx
                    2339   2339 ;		call	show_reg
                    2340   2340 ;		ex	AF,AF'
Z80-Assembler		Release 1.4				Page 40
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2341   2341 ;		exx
                    2342   2342 ;		ret
                    2343   2343 
                    2344   2344 ;show_reg:
                    2345   2345 
                    2346   2346 		;backup registers in bak_xx
0bb6  e5            2347   2347 		push	HL
0bb7  22 06 11      2348   2348 		ld	(bak_hl),HL
                    2349   2349 
0bba  f5            2350   2350 		push	AF
0bbb  e1            2351   2351 		pop	HL
0bbc  22 00 11      2352   2352 		ld	(bak_af),HL
                    2353   2353 
                    2354   2354 ;		push	BC
                    2355   2355 ;		pop	HL
0bbf  ed 43 02 11   2356   2356 		ld	(bak_bc),BC
                    2357   2357 
                    2358   2358 ;		push	DE
                    2359   2359 ;		pop	HL
0bc3  ed 53 04 11   2360   2360 		ld	(bak_de),DE
                    2361   2361 
                    2362   2362 ;		push	IX
                    2363   2363 ;		pop	HL
0bc7  dd 22 08 11   2364   2364 		ld	(bak_ix),IX
                    2365   2365 
                    2366   2366 ;		push	IY
                    2367   2367 ;		pop	HL
0bcb  fd 22 0a 11   2368   2368 		ld	(bak_iy),IY
                    2369   2369 
0bcf  fd e5         2370   2370 		push	IY
0bd1  dd e5         2371   2371 		push	IX
0bd3  d5            2372   2372 		push	DE
0bd4  c5            2373   2373 		push	BC
0bd5  f5            2374   2374 		push	AF
                    2375   2375 
0bd6  cd 99 0c      2376   2376 		call	l_rd3		;make newline
                    2377   2377 
0bd9  21 bc 0c      2378   2378 		ld	HL,reg_af	;announce transmission of AF
0bdc  cd 0e 08      2379   2379 		call	TX_STR
0bdf  f1            2380   2380 		pop	AF		;restore value input from port from stack
0be0  f5            2381   2381 		push	AF
0be1  cd d3 08      2382   2382 		call	APP_ACCU	;append value to STD_OUT
0be4  c1            2383   2383 		pop	BC
0be5  cd 92 0c      2384   2384 		call	l_rd1
                    2385   2385 
0be8  21 c1 0c      2386   2386 		ld	HL,reg_bc	;announce transmission of BC
0beb  cd 0e 08      2387   2387 		call	TX_STR
0bee  f1            2388   2388 		pop	AF		;restore value input from port from stack
0bef  f5            2389   2389 		push	AF
0bf0  cd d3 08      2390   2390 		call	APP_ACCU	;append value to STD_OUT
0bf3  c1            2391   2391 		pop	BC
0bf4  cd 92 0c      2392   2392 		call	l_rd1
                    2393   2393 
0bf7  21 c6 0c      2394   2394 		ld	HL,reg_de	;announce transmission of DE
0bfa  cd 0e 08      2395   2395 		call	TX_STR
0bfd  f1            2396   2396 		pop	AF		;restore value input from port from stack
0bfe  f5            2397   2397 		push	AF
0bff  cd d3 08      2398   2398 		call	APP_ACCU	;append value to STD_OUT
0c02  c1            2399   2399 		pop	BC
0c03  cd 92 0c      2400   2400 		call	l_rd1
Z80-Assembler		Release 1.4				Page 41
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2401   2401 
0c06  21 d0 0c      2402   2402 		ld	HL,reg_ix	;announce transmission of IX
0c09  cd 0e 08      2403   2403 		call	TX_STR
0c0c  f1            2404   2404 		pop	AF		;restore value input from port from stack
0c0d  f5            2405   2405 		push	AF
0c0e  cd d3 08      2406   2406 		call	APP_ACCU	;append value to STD_OUT
0c11  c1            2407   2407 		pop	BC
0c12  cd 92 0c      2408   2408 		call	l_rd1
                    2409   2409 
0c15  21 d5 0c      2410   2410 		ld	HL,reg_iy	;announce transmission of IY
0c18  cd 0e 08      2411   2411 		call	TX_STR
0c1b  f1            2412   2412 		pop	AF		;restore value input from port from stack
0c1c  f5            2413   2413 		push	AF
0c1d  cd d3 08      2414   2414 		call	APP_ACCU	;append value to STD_OUT
0c20  c1            2415   2415 		pop	BC
0c21  cd 92 0c      2416   2416 		call	l_rd1
                    2417   2417 
0c24  21 cb 0c      2418   2418 		ld	HL,reg_hl	;announce transmission of HL
0c27  cd 0e 08      2419   2419 		call	TX_STR
0c2a  f1            2420   2420 		pop	AF		;restore value input from port from stack
0c2b  f5            2421   2421 		push	AF
0c2c  cd d3 08      2422   2422 		call	APP_ACCU	;append value to STD_OUT
0c2f  c1            2423   2423 		pop	BC
0c30  cd 92 0c      2424   2424 		call	l_rd1
                    2425   2425 
                    2426   2426 		;get return address
                    2427   2427 ;		pop	DE
0c33  e1            2428   2428 		pop	HL
0c34  22 0c 11      2429   2429 		ld	(bak_pc),HL
0c37  e5            2430   2430 		push	HL
                    2431   2431 ;		push	DE
                    2432   2432 
0c38  21 da 0c      2433   2433 		ld	HL,reg_pc	;announce transmission of PC
0c3b  cd 0e 08      2434   2434 		call	TX_STR
0c3e  2a 0c 11      2435   2435 		ld	HL,(bak_pc)
0c41  7c            2436   2436 		ld	A,H
0c42  cd d3 08      2437   2437 		call	APP_ACCU	;append value to STD_OUT
0c45  2a 0c 11      2438   2438 		ld	HL,(bak_pc)
0c48  7d            2439   2439 		ld	A,L
0c49  cd 93 0c      2440   2440 		call	l_rd2
                    2441   2441 
0c4c  21 df 0c      2442   2442 		ld	HL,reg_sp	;announce transmission of SP
0c4f  cd 0e 08      2443   2443 		call	TX_STR
0c52  ed 73 0e 11   2444   2444 		ld	(bak_sp),SP
0c56  2a 0e 11      2445   2445 		ld	HL,(bak_sp)
                    2446   2446 ;		inc	HL
                    2447   2447 ;		inc	HL
0c59  23            2448   2448 		inc	HL
0c5a  23            2449   2449 		inc	HL
0c5b  22 0e 11      2450   2450 		ld	(bak_sp),HL	;correct bak_sp to value previous to register_dump call
0c5e  7c            2451   2451 		ld	A,H
0c5f  cd d3 08      2452   2452 		call	APP_ACCU	;append value to STD_OUT
0c62  2a 0e 11      2453   2453 		ld	HL,(bak_sp)
0c65  7d            2454   2454 		ld	A,L
0c66  cd 93 0c      2455   2455 		call	l_rd2
                    2456   2456 
0c69  21 e4 0c      2457   2457 		ld	HL,reg_ir	;announce transmission of IR
0c6c  cd 0e 08      2458   2458 		call	TX_STR
0c6f  ed 57         2459   2459 		ld	A,I
0c71  cd d3 08      2460   2460 		call	APP_ACCU	;append value to STD_OUT
Z80-Assembler		Release 1.4				Page 42
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0c74  ed 5f         2461   2461 		ld	A,R
0c76  cd 93 0c      2462   2462 		call	l_rd2
                    2463   2463 
                    2464   2464 
                    2465   2465 		;restore registers
0c79  ed 4b 02 11   2466   2466 		ld	BC,(bak_bc)
0c7d  ed 5b 04 11   2467   2467 		ld	DE,(bak_de)
0c81  fd 2a 08 11   2468   2468 		ld	IY,(bak_ix)
0c85  dd 2a 0a 11   2469   2469 		ld	IX,(bak_iy)
0c89  2a 00 11      2470   2470 		ld	HL,(bak_af)
0c8c  e5            2471   2471 		push	HL
0c8d  f1            2472   2472 		pop	AF
0c8e  2a 06 11      2473   2473 		ld	HL,(bak_hl)
                    2474   2474 	
                    2475   2475 
                    2476   2476 
0c91  c9            2477   2477 		ret
                    2478   2478 
                    2479   2479 l_rd1:
0c92  79            2480   2480 		ld	a,c
0c93  cd d3 08      2481   2481 l_rd2:		call	APP_ACCU	;append value to STD_OUT
0c96  cd 07 08      2482   2482 		call	TX_STD_OUT	;TX input value to host
0c99  21 39 0e      2483   2483 l_rd3:		ld	HL,NEW_LINE	;transmit new line
0c9c  cd 0e 08      2484   2484 		call	TX_STR
0c9f  c9            2485   2485 		ret
                    2486   2486 
                    2487   2487 
                    2488   2488 ;-------TEXT BEGIN---------------------------------------------------
                    2489   2489 Welcome:
0ca0  0c            2490   2490 	DEFB	0Ch	;CLS
0ca1  54 52 41 49   2491   2491 	DEFM	'TRAIN-Z V9.4 ready' ;sys version
0ca5  4e 2d 5a 20   2491   2492
0ca9  56 39 2e 34   2491   2493
0cad  20 72 65 61   2491   2494
0cb1  64 79         2491   2495
0cb3  00            2492   2496 	DEFB	0
                    2493   2497 	
0cb4  0a            2494   2498 prompt:	DEFB	0Ah	;next line
0cb5  0d            2495   2499 	DEFB	0Dh	;cursor home
0cb6  63 6d 64 3e   2496   2500 	DEFM	'cmd> '
0cba  20            2496   2501
0cbb  00            2497   2502 	DEFB	0
                    2498   2503 
                    2499   2504 reg_af:
0cbc  41 46 3a 20   2500   2505 	DEFM	'AF: '
0cc0  00            2501   2506 	DEFB	0
                    2502   2507 
                    2503   2508 reg_bc:
0cc1  42 43 3a 20   2504   2509 	DEFM	'BC: '
0cc5  00            2505   2510 	DEFB	0
                    2506   2511 
                    2507   2512 reg_de:
0cc6  44 45 3a 20   2508   2513 	DEFM	'DE: '
0cca  00            2509   2514 	DEFB	0
                    2510   2515 
                    2511   2516 reg_hl:
0ccb  48 4c 3a 20   2512   2517 	DEFM	'HL: '
0ccf  00            2513   2518 	DEFB	0
                    2514   2519 
                    2515   2520 reg_ix:
Z80-Assembler		Release 1.4				Page 43
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0cd0  49 58 3a 20   2516   2521 	DEFM	'IX: '
0cd4  00            2517   2522 	DEFB	0
                    2518   2523 
                    2519   2524 reg_iy:
0cd5  49 59 3a 20   2520   2525 	DEFM	'IY: '
0cd9  00            2521   2526 	DEFB	0
                    2522   2527 
                    2523   2528 reg_pc:
0cda  50 43 3a 20   2524   2529 	DEFM	'PC: '
0cde  00            2525   2530 	DEFB	0
                    2526   2531 
                    2527   2532 reg_sp:
0cdf  53 50 3a 20   2528   2533 	DEFM	'SP: '
0ce3  00            2529   2534 	DEFB	0
                    2530   2535 
                    2531   2536 reg_ir:
0ce4  49 52 3a 20   2532   2537 	DEFM	'IR: '
0ce8  00            2533   2538 	DEFB	0
                    2534   2539 
                    2535   2540 error:
0ce9  2e 2e 2e 3f   2536   2541 	DEFM	'...?'
0ced  00            2537   2542 	DEFB	0
                    2538   2543 
                    2539   2544 mem_adr16:
0cee  6d 65 6d 5f   2540   2545 	DEFM	'mem_adr: '
0cf2  61 64 72 3a   2540   2546
0cf6  20            2540   2547
0cf7  00            2541   2548 	DEFB	0	
                    2542   2549 
                    2543   2550 source16:
0cf8  73 6f 75 72   2544   2551 	DEFM	'source_adr: '
0cfc  63 65 5f 61   2544   2552
0d00  64 72 3a 20   2544   2553
0d04  00            2545   2554 	DEFB	0	
                    2546   2555 
                    2547   2556 destin16:
0d05  64 65 73 74   2548   2557 	DEFM	'destination_adr: '
0d09  69 6e 61 74   2548   2558
0d0d  69 6f 6e 5f   2548   2559
0d11  61 64 72 3a   2548   2560
0d15  20            2548   2561
0d16  00            2549   2562 	DEFB	0	
                    2550   2563 	
                    2551   2564 count16:
0d17  6e 75 6d 62   2552   2565 	DEFM	'number_of_bytes: '
0d1b  65 72 5f 6f   2552   2566
0d1f  66 5f 62 79   2552   2567
0d23  74 65 73 3a   2552   2568
0d27  20            2552   2569
0d28  00            2553   2570 	DEFB	0	
                    2554   2571 
                    2555   2572 new_dat:
0d29  6e 65 77 5f   2556   2573 	DEFM	'new_dat: '
0d2d  64 61 74 3a   2556   2574
0d31  20            2556   2575
0d32  00            2557   2576 	DEFB	0h
                    2558   2577 
                    2559   2578 AWT_TRM:
0d33  70 6c 65 61   2560   2579 	DEFM	'please send file via xmodem !'
0d37  73 65 20 73   2560   2580
Z80-Assembler		Release 1.4				Page 44
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0d3b  65 6e 64 20   2560   2581
0d3f  66 69 6c 65   2560   2582
0d43  20 76 69 61   2560   2583
0d47  20 78 6d 6f   2560   2584
0d4b  64 65 6d 20   2560   2585
0d4f  21            2560   2586
0d50  00            2561   2587 	DEFB	0h
                    2562   2588 
                    2563   2589 io_adr:
0d51  69 6f 5f 61   2564   2590 	DEFM	'io_addr: '
0d55  64 64 72 3a   2564   2591
0d59  20            2564   2592
0d5a  00            2565   2593 	DEFB	0h
                    2566   2594 
                    2567   2595 io_dat:
0d5b  69 6f 5f 64   2568   2596 	DEFM	'io_data: '
0d5f  61 74 61 3a   2568   2597
0d63  20            2568   2598
0d64  00            2569   2599 	DEFB	0h
                    2570   2600 
                    2571   2601 
                    2572   2602 ;I2C PIOs:
                    2573   2603 p0_sel:
0d65  70 30 5f 73   2574   2604 	DEFM	'p0_sel: '
0d69  65 6c 3a 20   2574   2605
0d6d  00            2575   2606 	DEFB	0h
                    2576   2607 
                    2577   2608 p1_sel:
0d6e  70 31 5f 73   2578   2609 	DEFM	'p1_sel: '
0d72  65 6c 3a 20   2578   2610
0d76  00            2579   2611 	DEFB	0h
                    2580   2612 
                    2581   2613 p0_out:
0d77  70 30 5f 6f   2582   2614 	DEFM	'p0_out: '
0d7b  75 74 3a 20   2582   2615
0d7f  00            2583   2616 	DEFB	0h
                    2584   2617 
                    2585   2618 p1_out:
0d80  70 31 5f 6f   2586   2619 	DEFM	'p1_out: '
0d84  75 74 3a 20   2586   2620
0d88  00            2587   2621 	DEFB	0h
                    2588   2622 
                    2589   2623 p0_in:
0d89  70 30 5f 69   2590   2624 	DEFM	'p0_in:  '
0d8d  6e 3a 20 20   2590   2625
0d91  00            2591   2626 	DEFB	0h
                    2592   2627 
                    2593   2628 p1_in:
0d92  70 31 5f 69   2594   2629 	DEFM	'p1_in:  '
0d96  6e 3a 20 20   2594   2630
0d9a  00            2595   2631 	DEFB	0h
                    2596   2632 
                    2597   2633 ;I2C FLASHs
                    2598   2634 f0_sel:
0d9b  66 30 5f 73   2599   2635 	DEFM	'f0_sel: '
0d9f  65 6c 3a 20   2599   2636
0da3  00            2600   2637 	DEFB	0h
                    2601   2638 
                    2602   2639 f1_sel:
0da4  66 31 5f 73   2603   2640 	DEFM	'f1_sel: '
Z80-Assembler		Release 1.4				Page 45
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0da8  65 6c 3a 20   2603   2641
0dac  00            2604   2642 	DEFB	0h
                    2605   2643 
                    2606   2644 f0_adr:
0dad  66 30 5f 61   2607   2645 	DEFM	'f0_adr: '
0db1  64 72 3a 20   2607   2646
0db5  00            2608   2647 	DEFB	0h
                    2609   2648 
                    2610   2649 f1_adr:
0db6  66 31 5f 61   2611   2650 	DEFM	'f1_adr: '
0dba  64 72 3a 20   2611   2651
0dbe  00            2612   2652 	DEFB	0h
                    2613   2653 
                    2614   2654 f0_daw:
0dbf  66 30 5f 64   2615   2655 	DEFM	'f0_daw: '
0dc3  61 77 3a 20   2615   2656
0dc7  00            2616   2657 	DEFB	0h
                    2617   2658 
                    2618   2659 f1_daw:
0dc8  66 31 5f 64   2619   2660 	DEFM	'f1_daw: '
0dcc  61 77 3a 20   2619   2661
0dd0  00            2620   2662 	DEFB	0h
                    2621   2663 
                    2622   2664 f0_dar:
0dd1  66 30 5f 64   2623   2665 	DEFM	'f0_dar: '
0dd5  61 72 3a 20   2623   2666
0dd9  00            2624   2667 	DEFB	0h
                    2625   2668 
                    2626   2669 f1_dar:
0dda  66 31 5f 64   2627   2670 	DEFM	'f1_dar: '
0dde  61 72 3a 20   2627   2671
0de2  00            2628   2672 	DEFB	0h
                    2629   2673 
0de3  66 6c 61 73   2630   2674 fl_id:	DEFM	'flash-id: '
0de7  68 2d 69 64   2630   2675
0deb  3a 20         2630   2676
0ded  00            2631   2677 	DEFB	0h
                    2632   2678 
                    2633   2679 flashfail:
0dee  66 61 69 6c   2634   2680 	DEFM	'fail !'
0df2  20 21         2634   2681
0df4  00            2635   2682 	DEFB	0h
                    2636   2683 
0df5  20 61 74 3a   2637   2684 at:	DEFM	' at: '
0df9  20            2637   2685
0dfa  00            2638   2686 	DEFB	0h
                    2639   2687 
0dfb  20 65 78 70   2640   2688 expect:	DEFM	' expected: '
0dff  65 63 74 65   2640   2689
0e03  64 3a 20      2640   2690
0e06  00            2641   2691 	DEFB	0h
                    2642   2692 
0e07  20 72 65 61   2643   2693 read:	DEFM	' read: '
0e0b  64 3a 20      2643   2694
0e0e  00            2644   2695 	DEFB	0h
                    2645   2696 
                    2646   2697 i2cflash:
0e0f  49 32 43 20   2647   2698 	DEFM	'I2C SEEPROM...'
0e13  53 45 45 50   2647   2699
0e17  52 4f 4d 2e   2647   2700
Z80-Assembler		Release 1.4				Page 46
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
0e1b  2e 2e         2647   2701
0e1d  00            2648   2702 	DEFB	0h
                    2649   2703 
                    2650   2704 i2cpio:
0e1e  49 32 43 20   2651   2705 	DEFM	'I2C Expander...'
0e22  45 78 70 61   2651   2706
0e26  6e 64 65 72   2651   2707
0e2a  2e 2e 2e      2651   2708
0e2d  00            2652   2709 	DEFB	0h
                    2653   2710 
                    2654   2711 pio_ab:
0e2e  50 49 4f 20   2655   2712 	DEFM	'PIO A/B...'
0e32  41 2f 42 2e   2655   2713
0e36  2e 2e         2655   2714
0e38  00            2656   2715 	DEFB	0h
                    2657   2716 
                    2658   2717 
                    2659   2718 NEW_LINE:
0e39  0d            2660   2719 	DEFB	0Dh	;next line
0e3a  0a            2661   2720 	DEFB	0Ah	;cursor home
0e3b  00            2662   2721 	DEFB	0
                    2663   2722 			
                    2664   2723 BS_SP_BS:
0e3c  08            2665   2724  	DEFB  	08h		;BSP
0e3d  20            2666   2725 	DEFB	20h		;SPACE
0e3e  08            2667   2726 	DEFB	08h		;BSP
0e3f  00            2668   2727 	DEFB	0
                    2669   2728 
                    2670   2729 2xBS:
0e40  08            2671   2730  	DEFB  	08h		;BSP
0e41  08            2672   2731 	DEFB	08h		;BSP
0e42  00            2673   2732 	DEFB	0
                    2674   2733 
                    2675   2734 	
                    2676   2735 ;-------COMMAND SET begin----------------------------------------		
                    2677   2736 
                    2678   2737 HELP:	
0e43  68 65 6c 70   2679   2738 	DEFM	'help'
0e47  0d            2680   2739 	DEFB	0Dh
                    2681   2740 
                    2682   2741 CMD_SET:
                    2683   2742 
                    2684   2743 POUT:
0e48  70 6f 72 74   2685   2744 	DEFM	'portout'
0e4c  6f 75 74      2685   2745
0e4f  0d            2686   2746 	DEFB	0Dh	;cursor home
0e50  0a            2687   2747 	DEFB	0Ah	;next line
                    2688   2748 
                    2689   2749 PIN:
0e51  70 6f 72 74   2690   2750 	DEFM	'portin'
0e55  69 6e         2690   2751
0e57  0d            2691   2752 	DEFB	0Dh	;cursor home
0e58  0a            2692   2753 	DEFB	0Ah	;next line
                    2693   2754 
                    2694   2755 RSTI2C0:
0e59  72 73 74 69   2695   2756 	DEFM	'rsti0'
0e5d  30            2695   2757
0e5e  0d            2696   2758 	DEFB	0Dh	;cursor home
0e5f  0a            2697   2759 	DEFB	0Ah	;next line
                    2698   2760 
Z80-Assembler		Release 1.4				Page 47
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2699   2761 RSTI2C1:
0e60  72 73 74 69   2700   2762 	DEFM	'rsti1'
0e64  31            2700   2763
0e65  0d            2701   2764 	DEFB	0Dh	;cursor home
0e66  0a            2702   2765 	DEFB	0Ah	;next line
                    2703   2766 
                    2704   2767 I2C0F:
0e67  69 30 66      2705   2768 	DEFM	'i0f'
0e6a  0d            2706   2769 	DEFB	0Dh	;cursor home
0e6b  0a            2707   2770 	DEFB	0Ah	;next line
                    2708   2771 
                    2709   2772 I2C0P:
0e6c  69 30 70      2710   2773 	DEFM	'i0p'
0e6f  0d            2711   2774 	DEFB	0Dh	;cursor home
0e70  0a            2712   2775 	DEFB	0Ah	;next line
                    2713   2776 
                    2714   2777 I2C1F:
0e71  69 31 66      2715   2778 	DEFM	'i1f'	
0e74  0d            2716   2779 	DEFB	0Dh	;cursor home
0e75  0a            2717   2780 	DEFB	0Ah	;next line
                    2718   2781 
                    2719   2782 I2C1P:
0e76  69 31 70      2720   2783 	DEFM	'i1p'
0e79  0d            2721   2784 	DEFB	0Dh	;cursor home
0e7a  0a            2722   2785 	DEFB	0Ah	;next line
                    2723   2786 
                    2724   2787 VIEW_MEM:
0e7b  76 69 65 77   2725   2788 	DEFM	'viewmem'
0e7f  6d 65 6d      2725   2789
0e82  0d            2726   2790 	DEFB	0Dh	;cursor home
0e83  0a            2727   2791 	DEFB	0Ah	;next line
                    2728   2792 	
                    2729   2793 cmp:	
0e84  63 6f 6d 70   2730   2794 	DEFM	'comp'
0e88  0d            2731   2795 	DEFB	0Dh	;cursor home
0e89  0a            2732   2796 	DEFB	0Ah	;next line
                    2733   2797 
                    2734   2798 copy:
0e8a  63 6f 70 79   2735   2799 	DEFM	'copy'
0e8e  0d            2736   2800 	DEFB	0Dh	;cursor home
0e8f  0a            2737   2801 	DEFB	0Ah	;next line
                    2738   2802 
                    2739   2803 fill:
0e90  66 69 6c 6c   2740   2804 	DEFM	'fill'
0e94  0d            2741   2805 	DEFB	0Dh	;cursor home
0e95  0a            2742   2806 	DEFB	0Ah	;next line
                    2743   2807 
                    2744   2808 PRG_FL:
0e96  70 72 67 66   2745   2809 	DEFM	'prgflash'
0e9a  6c 61 73 68   2745   2810
0e9e  0d            2746   2811 	DEFB	0Dh	;cursor home
0e9f  0a            2747   2812 	DEFB	0Ah	;next line
                    2748   2813 
                    2749   2814 erf:
0ea0  65 72 61 73   2750   2815 	DEFM	'eraseflash'
0ea4  65 66 6c 61   2750   2816
0ea8  73 68         2750   2817
0eaa  0d            2751   2818 	DEFB	0Dh	;cursor home
0eab  0a            2752   2819 	DEFB	0Ah	;next line
                    2753   2820 
Z80-Assembler		Release 1.4				Page 48
Source file: train-z94_gpl.asm
Title:       

LOC   OBJECT CODE   LINE   STMT SOURCE CODE
                    2754   2821 RAM_S:
0eac  74 65 73 74   2755   2822 	DEFM	'testmem'
0eb0  6d 65 6d      2755   2823
0eb3  0d            2756   2824 	DEFB	0Dh	;cursor home
0eb4  0a            2757   2825 	DEFB	0Ah	;next line
                    2758   2826 
                    2759   2827 DLD:	
0eb5  6c 6f 61 64   2760   2828 	DEFM	'load'
0eb9  0d            2761   2829 	DEFB	0Dh	;cursor home
0eba  0a            2762   2830 	DEFB	0Ah	;next line
                    2763   2831 
                    2764   2832 ca_usr_prg:
0ebb  63 61 6c 6c   2765   2833 	DEFM	'call'
0ebf  0d            2766   2834 	DEFB	0Dh	;cursor home
0ec0  0a            2767   2835 	DEFB	0Ah	;next line
                    2768   2836 
                    2769   2837 EO:	
0ec1  65 63 68 6f   2770   2838 	DEFM	'echooff'
0ec5  6f 66 66      2770   2839
0ec8  0d            2771   2840 	DEFB	0Dh	;cursor home
0ec9  0a            2772   2841 	DEFB	0Ah	;next line
                    2773   2842 
                    2774   2843 i2c1_test:
0eca  74 65 73 74   2775   2844 	DEFM	'testi1'
0ece  69 31         2775   2845
0ed0  0d            2776   2846 	DEFB	0Dh	;cursor home
0ed1  0a            2777   2847 	DEFB	0Ah	;next line
                    2778   2848 
                    2779   2849 pio_test:
0ed2  74 65 73 74   2780   2850 	DEFM	'testpio'
0ed6  70 69 6f      2780   2851
0ed9  0d            2781   2852 	DEFB	0Dh	;cursor home
0eda  0a            2782   2853 	DEFB	0Ah	;next line
                    2783   2854 
                    2784   2855 
                    2785   2856 CMDs_END:
0edb  00            2786   2857 	DEFB	0h
                    2787   2858 
                    2788   2859 
                    2789   2860 
